TRT in Amode64 does not clear high word of R1

[abekornelis]

Reported by Bob Schulien, email dd 2025-01-16, 10:08

The TRT instruction does not clear the high half of R1 if the CPU is in AMODE 64.
LGHI R1,-1
TRT FIELD,TRT_TABLE
IF (NZ)
R1 high half is still high-values/not a 64 bit address.
ENDIF
Workaround is to do a LGHI R1,0 before the TRT.

[abekornelis]

Additional documentation on the error:
Issue596.txt

[jyganci]

While looking at pz390.java , two additional instructions, TRTR and EDMK, also do not set the high half of GR1 when running in 64-bit addressing mode. Also, RPI 828 incorrectly set the R1 value when TRTR finds a match when running in 31-bit addressing mode. POP for TRTR states "In the 31-bit addressing mode, the address replaces bits 33-63 of general register 1, and bits 0-32 of this register remain unchanged." This is different from what happens for TRT in 31-bit mode, which is what RPI 828 fixed. RPI 828 zeros bit 32 of R1. This should NOT be done for TRTR. RPI 828 correctly zeros R1 bit 32 for TRT and EDMK in 31-bit mode.