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rvmon.md

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RVMON

The RISC-V machine code monitor is entered with the RVMON BASIC statement. Whenever the monitor is entered, the RISC-V processor is put into the halted state.

Like the C128 machine code monitor, any numeric input can be specified in hexadecimal ($ prefix or no prefix), decimal (+ prefix), octal (& prefix) or binary (% prefix). Giving a prefixed number as a command displays it in all bases.

Addresses are specified in the 32-bit address space of the RISC-V processor, but the first 64K overlaps the internal memory space of the C64 which makes it possible to for example transfer data between internal and external memory using the T command.

The following commands are supported:

A address opcode arguments

Assemble. Only base instructions are recognized, no pseudoinstructions. Furthermore, ABI names of registers are not recognized, only x followed by an integer 0-31. The assemble command can also be given as ..

C start-address end-address other-address

Compare. Memory starting at start-address and ending at end-address is compared to memory at target-address, and the addresses of all non-matching bytes are printed.

D start-address end-address

Disassemble. Both start-address and end-address can be omitted.

F start-address end-address byte

Fill. Memory starting at start-address and ending at end-address is filled with byte.

G address

Go. Bring the RISC-V processor out of the halted state and exit the monitor. If an address is provided, then the RISC-V processor will start executing at that address, otherwise it resumes from the point where it was halted.

H start-address end-address data

Hunt. List all addresses between start-address and end-address where data can be found. The data can be either a list of byte values, or a string prefixed by '.

J address

Jump. Start the RISC-V processor executing at address, and wait for the function to return, then halt the processor again.

M start-address end-address

Memory dump. Both start-address and end-address can be omitted.

R

Register dump. The first line of the dump contains pc and x1 through x3, the next line x4 through x7, and so on.

T start-address end-address target-address

Transfer data. Memory starting at start-address and ending at end-address is copied to target-address.

X

Exit monitor. The RISC-V processor is left in the halted state. To exit the monitor with the RISC-V processor running, use the G command instead.

Z steps

Single step. The RISC-V processor executes steps instructions (1 if steps is omitted) and then halts again. The next instruction to execute is then displayed.

> addr byte ...

Modify memory. The given bytes are written to memory starting at addr.

; reg value ...

Set registers. Starting with register number reg (which must be provided in decimal, without the + prefix), set registers to the specified values. If reg is zero, the first register written is pc, not x0 (which can not be written).