diff --git a/boards/xtensa/m5stack_core2/Kconfig.board b/boards/xtensa/m5stack_core2/Kconfig.board new file mode 100644 index 000000000000000..c6286b8c169a886 --- /dev/null +++ b/boards/xtensa/m5stack_core2/Kconfig.board @@ -0,0 +1,8 @@ +# M5Stack Core2 board configuration + +# Copyright (c) 2023 Martin Kiepfer +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_M5STACK_CORE2 + bool "M5Stack Core2 Development Board" + depends on SOC_SERIES_ESP32 diff --git a/boards/xtensa/m5stack_core2/Kconfig.defconfig b/boards/xtensa/m5stack_core2/Kconfig.defconfig new file mode 100644 index 000000000000000..1171fe01da77f91 --- /dev/null +++ b/boards/xtensa/m5stack_core2/Kconfig.defconfig @@ -0,0 +1,55 @@ +# M5Stack Core2 board configuration +# Copyright (c) 2022 AVSystem Sławomir Wolf Sp.j. (AVSystem) +# Copyright (c) 2023 Martin Kiepfer +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_M5STACK_CORE2 + +config BOARD + default "m5stack_core2" + depends on BOARD_M5STACK_CORE2 + +config ENTROPY_GENERATOR + default y + +config HEAP_MEM_POOL_SIZE + default 98304 if WIFI + default 65536 if BT + default 4096 + +config KERNEL_MEM_POOL + default y + +choice BT_HCI_BUS_TYPE + default BT_ESP32 if BT +endchoice + +config I2C + default y + +config ESP_SPIRAM + default n + +choice SPIRAM_TYPE + default SPIRAM_TYPE_ESPPSRAM64 +endchoice + +config FLASH + default y + +config MFD_INIT_PRIORITY + default 60 + +config REGULATOR_AXP192_INIT_PRIORITY + default 76 + +config GPIO_AXP192_INIT_PRIORITY + default 80 + +config GPIO_HOGS_INIT_PRIORITY + default 81 + +config INPUT_FT5336_INTERRUPT + default y if INPUT + +endif # BOARD_M5STACK_CORE2 diff --git a/boards/xtensa/m5stack_core2/board.cmake b/boards/xtensa/m5stack_core2/board.cmake new file mode 100644 index 000000000000000..2f04d1fe8861ea6 --- /dev/null +++ b/boards/xtensa/m5stack_core2/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/xtensa/m5stack_core2/doc/img/m5stack_core2.webp b/boards/xtensa/m5stack_core2/doc/img/m5stack_core2.webp new file mode 100644 index 000000000000000..794c8e4c9cbe594 Binary files /dev/null and b/boards/xtensa/m5stack_core2/doc/img/m5stack_core2.webp differ diff --git a/boards/xtensa/m5stack_core2/doc/index.rst b/boards/xtensa/m5stack_core2/doc/index.rst new file mode 100644 index 000000000000000..e61165d6536526e --- /dev/null +++ b/boards/xtensa/m5stack_core2/doc/index.rst @@ -0,0 +1,194 @@ +.. _m5stack_core2: + +M5Stack Core2 +############# + +Overview +******** + +M5Stack Core2 is a ESP32-based development board from M5Stack. It is the successor for the Core module. + +M5Stack Core2 features the following integrated components: + +- ESP32-D0WDQ6-V3 chip (240MHz dual core, 600 DMIPS, 520KB SRAM, Wi-Fi) +- PSRAM 8MB +- Flash 16MB +- LCD IPS TFT 2", 320x240 px screen (ILI9342C) +- Touch screen (FT6336U) +- PMU AXP192 +- Audio NS4168 amplifier (1W-092 speaker) +- Vibration motor +- RTC BM8563 +- USB CP2104 +- SD-Card slot +- IMO 6-axis IMU MPU6886 +- MIC SPM1423 +- Battery 390mAh 3,7V + +.. figure:: img/m5stack_core2.webp + :align: center + :alt: M5Stack-Core2 + :width: 400 px + + M5Stack-Core2 module + +Functional Description +********************** + +The following table below describes the key components, interfaces, and controls +of the M5Stack Core2 board. + +.. _M5Core2 Schematic: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/schematic/Core/CORE2_V1.0_SCH.pdf +.. _MPU-ESP32: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/esp32_datasheet_en_v3.9.pdf +.. _TOUCH-FT6336U: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/Ft6336GU_Firmware%20外部寄存器_20151112-%20EN.xlsx +.. _SND-NS4168: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/NS4168_CN_datasheet.pdf +.. _MPU-6886: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/MPU-6886-000193%2Bv1.1_GHIC_en.pdf +.. _LCD-ILI9342C: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/ILI9342C-ILITEK.pdf +.. _SPM-1423: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/SPM1423HM4H-B_datasheet_en.pdf +.. _RTC-BM8563: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/BM8563_V1.1_cn.pdf +.. _SY7088: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/SY7088-Silergy.pdf +.. _PMU-AXP192: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/AXP192_datasheet_en.pdf +.. _VIB-1072_RFN01: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/1027RFN01-33d.pdf + ++------------------+--------------------------------------------------------------------------+ +| Key Component | Description | ++==================+==========================================================================+ +|| ESP32-D0WDQ6-V2 || This `MPU-ESP32`_ module provides complete Wi-Fi and Bluetooth | +|| module || functionalities and integrates a 16-MB SPI flash. | ++------------------+--------------------------------------------------------------------------+ +|| 32.768 kHz RTC || External precision 32.768 kHz crystal oscillator serves as a clock with | +|| || low-power consumption while the chip is in Deep-sleep mode. | ++------------------+--------------------------------------------------------------------------+ +| Status LED | One user LED connected to the GPIO pin. | ++------------------+--------------------------------------------------------------------------+ +|| USB Port || USB interface. Power supply for the board as well as the | +|| || communication interface between a computer and the board. | +|| || Contains: TypeC x 1, GROVE(I2C+I/O+UART) x 1 | ++------------------+--------------------------------------------------------------------------+ +| Reset button | Reset button | ++------------------+--------------------------------------------------------------------------+ +| Power Switch | Power on/off button. | ++------------------+--------------------------------------------------------------------------+ +|| LCD screen || Built-in LCD TFT display \(`LCD-ILI9342C`_, 2", 320x240 px\) | +|| || controlled via SPI interface | ++------------------+--------------------------------------------------------------------------+ +|| 3-axis || The `MPU-6886`_ is a 6-axis MotionTracking device that combines a | +|| gyrosopce || 3-axis gyroscope and a 3-axis accelerometer. | ++------------------+--------------------------------------------------------------------------+ +|| Built-in || The `SPM-1423`_ I2S driven microphone. | +|| microphone || | ++------------------+--------------------------------------------------------------------------+ +| Built-in speaker | 1W speaker for audio output via I2S interface. | ++------------------+--------------------------------------------------------------------------+ + +Supported Features +================== + +The Zephyr m5stack_core2 board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | reset and clock control | ++-----------+------------+-------------------------------------+ +| COUNTER | on-chip | rtc | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ +| DAC | on-chip | dac | ++-----------+------------+-------------------------------------+ +| die-temp | on-chip | die temperature sensor | ++-----------+------------+-------------------------------------+ + + +Start Application Development +***************************** + +Before powering up your M5Stack Core2, please make sure that the board is in good +condition with no obvious signs of damage. + +System requirements +=================== + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +------------------- + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_core2 + :goals: build + +The usual ``flash`` target will work with the ``m5stack_core2`` board +configuration. Here is an example for the :ref:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_core2 + :goals: flash + +The baud rate of 921600bps is set by default. If experiencing issues when flashing, +try using different values by using ``--esp-baud-rate `` option during +``west flash`` (e.g. ``west flash --esp-baud-rate 115200``). + +You can also open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! m5stack_core2 + +Debugging +--------- + +M5Stack Core2 debugging is not supported due to pinout limitations. + +Related Documents +***************** + +- `M5StickC PLUS schematic `_ (WEBP) +- `ESP32-PICO-D4 Datasheet `_ (PDF) +- `M5StickC PLUS docs `_ +- `ESP32 Datasheet `_ (PDF) +- `ESP32 Hardware Reference `_ diff --git a/boards/xtensa/m5stack_core2/m5stack_core2-pinctrl.dtsi b/boards/xtensa/m5stack_core2/m5stack_core2-pinctrl.dtsi new file mode 100644 index 000000000000000..5588a45ca266528 --- /dev/null +++ b/boards/xtensa/m5stack_core2/m5stack_core2-pinctrl.dtsi @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2022 AVSystem Sławomir Wolf Sp.j. (AVSystem) + * Copyright (c) 2023 Martin Kiepfer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_tx_gpio1: uart0_tx_gpio1 { + pinmux = ; + }; + + uart0_rx_gpio3: uart0_rx_gpio3 { + pinmux = ; + bias-pull-up; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + +}; diff --git a/boards/xtensa/m5stack_core2/m5stack_core2.dts b/boards/xtensa/m5stack_core2/m5stack_core2.dts new file mode 100644 index 000000000000000..2fa9fa4ef0bd0d1 --- /dev/null +++ b/boards/xtensa/m5stack_core2/m5stack_core2.dts @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2023 Martin Kiepfer + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include "m5stack_core2-pinctrl.dtsi" +#include +#include + +/ { + model = "esp32"; + compatible = "espressif,esp32"; + + aliases { + pwr-led = &pwr_led; + uart-0 = &uart0; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + rtc = &pfc8563_rtc; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,display = &ili9342c; + zephyr,keyboard-scan = &kscan_input; + zephyr,code-partition = &slot0_partition; + zephyr,rtc = &pfc8563_rtc; + }; +}; + +&cpu0 { + clock-frequency = ; +}; + +&cpu1 { + clock-frequency = ; +}; + +&psram0 { + reg = <0x3f800000 DT_SIZE_M(8)>; + status = "okay"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_tx_gpio1 &uart0_rx_gpio3>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio0 { + gpio-reserved-ranges = <6 11>, // PSRAM + <20>,<24>,<28 31>; // NC +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>; + scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>; + pinctrl-0 = <&i2c0_default>; + scl-timeout-us = <0>; + pinctrl-names = "default"; + + pfc8563_rtc: pfc8563@51 { + compatible = "nxp,pcf8523"; + reg = <0x51>; + status = "okay"; + battery-switch-over = "disabled"; + }; + + axp192_pmic: axp192@34 { + compatible = "x-powers,axp192"; + reg = <0x34>; + status = "okay"; + + axp192_regulator: axp192_regulator { + compatible = "x-powers,axp192-regulator"; + status = "okay"; + + vdd_mcu: DCDC1 { + regulator-init-microvolt = <3350000>; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + regulator-boot-on; + regulator-always-on; + }; + + lcd_bg: DCDC3 { + regulator-init-microvolt = <2800000>; + regulator-min-microvolt = <0>; + regulator-max-microvolt = <2800000>; + regulator-boot-on; + }; + + v_peri: LDO2 { + regulator-init-microvolt = <3300000>; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + vib_motor: LDO3 { + regulator-init-microvolt = <2800000>; + }; + }; + + axp192_gpio: axp192_gpio { + compatible = "x-powers,axp192-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <5>; + status = "okay"; + + pwr_led: axp192_gpio1 { + gpio-hog; + gpios = <1 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>; + output-high; + line-name = "pwr-led"; + }; + + bus_pwr_en: axp192_gpio0 { + gpio-hog; + gpios = <0 0>; + input; + }; + }; + }; + + ft5336@38 { + compatible = "focaltech,ft5336"; + reg = <0x38>; + int-gpios = <&gpio1 7 0>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; + }; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; + dma-enabled; + clock-frequency = <20000000>; + cs-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; + + ili9342c: ili9342c@0 { + compatible = "ilitek,ili9342c"; + spi-max-frequency = <20000000>; + reg = <0>; + cmd-data-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + reset-gpios = <&axp192_gpio 4 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>; + pixel-format = ; + display-inversion; + width = <320>; + height = <240>; + rotation = <0>; + }; +}; + + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&timer2 { + status = "okay"; +}; + +&timer3 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&flash0 { + status = "okay"; + reg = <0 0x400000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Reserve 60kB for the bootloader */ + boot_partition: partition@1000 { + label = "mcuboot"; + reg = <0x00001000 0x0000F000>; + read-only; + }; + + /* Reserve 1024kB for the application in slot 0 */ + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x00010000 0x00100000>; + }; + + /* Reserve 1024kB for the application in slot 1 */ + slot1_partition: partition@110000 { + label = "image-1"; + reg = <0x00110000 0x00100000>; + }; + + /* Reserve 256kB for the scratch partition */ + scratch_partition: partition@210000 { + label = "image-scratch"; + reg = <0x00210000 0x00040000>; + }; + + /* 14MB storage */ + storage_partition: partition@250000 { + label = "storage"; + reg = <0x00250000 0x00db0000>; + }; + }; +}; diff --git a/boards/xtensa/m5stack_core2/m5stack_core2.yaml b/boards/xtensa/m5stack_core2/m5stack_core2.yaml new file mode 100644 index 000000000000000..1ee36021b39bcd0 --- /dev/null +++ b/boards/xtensa/m5stack_core2/m5stack_core2.yaml @@ -0,0 +1,20 @@ +identifier: m5stack_core2 +name: M5Stack Core2 +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - i2c + - spi + - watchdog + - regulator + - uart + - pinmux + - nvs +testing: + default: true + ignore_tags: + - net + - bluetooth diff --git a/boards/xtensa/m5stack_core2/m5stack_core2_defconfig b/boards/xtensa/m5stack_core2/m5stack_core2_defconfig new file mode 100644 index 000000000000000..73ccddc6973e636 --- /dev/null +++ b/boards/xtensa/m5stack_core2/m5stack_core2_defconfig @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_BOARD_M5STACK_CORE2=y + +CONFIG_SOC_SERIES_ESP32=y +CONFIG_GEN_ISR_TABLES=y +CONFIG_XTENSA_USE_CORE_CRT1=n +CONFIG_XTENSA_RESET_VECTOR=n +CONFIG_GEN_IRQ_VECTOR_TABLE=n + +CONFIG_MAIN_STACK_SIZE=4096 +CONFIG_HEAP_MEM_POOL_SIZE=4096 +CONFIG_ESP_HEAP_MEM_POOL_REGION_1_SIZE=0 + +CONFIG_GPIO=y + +CONFIG_REGULATOR=y + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y + +# for debugging +CONFIG_SHELL=y diff --git a/boards/xtensa/m5stack_core2/support/openocd.cfg b/boards/xtensa/m5stack_core2/support/openocd.cfg new file mode 100644 index 000000000000000..338e6e4e6eae9a2 --- /dev/null +++ b/boards/xtensa/m5stack_core2/support/openocd.cfg @@ -0,0 +1,5 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +source [find interface/ftdi/esp32_devkitj_v1.cfg] +source [find target/esp32.cfg] diff --git a/tests/lib/devicetree/devices/testcase.yaml b/tests/lib/devicetree/devices/testcase.yaml index b57489b9a11936a..d7695220b8bdcb0 100644 --- a/tests/lib/devicetree/devices/testcase.yaml +++ b/tests/lib/devicetree/devices/testcase.yaml @@ -14,4 +14,5 @@ tests: - bt610 - bl5340_dvk_cpuapp - bl5340_dvk_cpuapp_ns + - m5stack_core2 - mimxrt595_evk_cm33