MIMXRT1160-EVK Octal Flash

[rtborg]

I have a MIMXRT1160-EVK, modified to use the on-board octal flash. I've confirmed it's working by flashing a modified Blinky example from MCUXPresso using LinkServer.

I tried enabling the octal flash from Zephyr by including the mx25um51345g node in device tree (attached as text file), and flashed using LinkServer's octal SPI algorithm. I can confirm file is flashed correctly by dumping the flash; however code (Zephyr's Blinky sample) does not run.
zephyr_dts.txt

What is the correct procedure for enabling and using octal flash with NXP IMXRT processors? In this case I am using mx25um51345g, but I also have boards with ISSI octal flash, which will need support.

[DerekSnell]

Hi @rtborg ,
Did you also update the Flash Configuration Block (FCB) for the octal flash? NXP does have other boards supported in Zephyr using the mx25um51345g flash, including the MIMXRT595-EVK or VMU-RT1170. The boards include a flash_config file, with the flash_config structure stored in the FCB. This tells the ROM bootloader how to configure the FlexSPI interface to access the external flash. The MIMXRT1160-EVK CMakeList.txt includes a file evkmimxrt1160_flexspi_nor_config.c which includes the qspiflash_config struct for the default QSPI flash on that EVK. The MIMXRT595-EVK includes a different flash_config.c for the octal flash mx25um51345g. Your board would need a similar FCB to boot from the octal flash.

The MIMXRT595-EVK or VMU-RT1170 boards would be good references for this flash to review, and see how they differ from the MIMXRT1160-EVK board files.

Let us know what you find. Best regards

[rtborg]

Hi @DerekSnell,

Following your instructions I managed to modify the flexspi_nor_config_t structure in evkmimxrt1160_flexspi_nor_config.c, and can flash MIMXRT1160-EVK using LinkServer. Thank you for your support.

I'm pasting the structure below for reference:

const flexspi_nor_config_t octalflash_config = {
    .memConfig =
        {
            .tag                 = FLEXSPI_CFG_BLK_TAG,
            .version             = FLEXSPI_CFG_BLK_VERSION,
            .readSampleClkSrc    = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
            .csHoldTime          = 3,
            .csSetupTime         = 3,
            .deviceModeCfgEnable = 1,
            .deviceModeType      = kDeviceConfigCmdType_Spi2Xpi,
            .waitTimeCfgCommands = 1,
            .deviceModeSeq =
                {
                    .seqNum   = 1,
                    .seqId    = 6, /* See Lookup table for more details */
                    .reserved = 0,
                },
            .deviceModeArg = 2, /* Enable OPI DDR mode */
            .controllerMiscOption =
                (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) | (1u << kFlexSpiMiscOffset_DdrModeEnable),
            .deviceType    = kFlexSpiDeviceType_SerialNOR,
            .sflashPadType = kSerialFlash_8Pads,
            .serialClkFreq = kFlexSpiSerialClk_133MHz,
            .sflashA1Size  = 64ul * 1024u * 1024u,
            .dataValidTime =
                {
                    [0] = 16,
                },
            .busyOffset      = 0u,
            .busyBitPolarity = 0u,
            .lookupTable =
                {
                		/* Read */// EEH+11H+32bit addr+20dummy cycles+ 4Bytes read data    //133Mhz 20 dummy=10+10
                		[0 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0xEE, CMD_DDR, FLEXSPI_8PAD, 0x11),//0x871187ee,
                		[0 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD, 0x20, DUMMY_DDR, FLEXSPI_8PAD, 0x0A),//0xb30a8b20,
                		[0 + 2] = FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_8PAD, 0x0A, READ_DDR, FLEXSPI_8PAD, 0x04),//0xa704b30a,

						/* Read Status SPI */// SPI 05h+ status data 0X24 maybe 0X04
                		[4*1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR  , FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x24),//0x24040405,

						/* Read Status OPI *///05H+FAH+ 4byte 00H(addr)+4Byte read
                		[4*2 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0x05, CMD_DDR, FLEXSPI_8PAD, 0xFA),//0x87fa8705,
                		[4*2 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0x00, CMD_DDR, FLEXSPI_8PAD, 0x00),//0x87008700,
                		[4*2 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0x00, CMD_DDR, FLEXSPI_8PAD, 0x00),//0x87008700,
                		[4*2 + 3] = FLEXSPI_LUT_SEQ(READ_DDR  , FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x00),//0x0000a704,

						/* Write enable SPI *///06h
                		[4*3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR  , FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),//0x00000406,

						/* Write enable OPI *///06h+F9H
                		[4*4 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0x06, CMD_DDR, FLEXSPI_8PAD, 0xF9),//0x87f98706,

						/* Erase sector */ //21H+DEH + 32bit address
                		[4*5 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0x21, CMD_DDR, FLEXSPI_8PAD, 0xDE),//0x87de8721,
                		[4*5 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR  , FLEXSPI_8PAD, 0x20, STOP, FLEXSPI_1PAD, 0x00),//0x00008b20,

                        /*Write Configuration Register 2 =01, Enable OPI DDR mode*/ //72H +32bit address + CR20x00000000 = 0x01
                		[4*6 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR  , FLEXSPI_1PAD, 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00),//0x04000472,
                		[4*6 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR  , FLEXSPI_1PAD, 0x00, CMD_SDR, FLEXSPI_1PAD, 0x00),//0x04000400,
                		[4*6 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR  , FLEXSPI_1PAD, 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01),//0x20010400,

						/*block erase*/ //DCH+23H+32bit address
                		[4*8 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0xDC, CMD_DDR, FLEXSPI_8PAD, 0x23),//0x872387dc,
                		[4*8 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD, 0x20, STOP, FLEXSPI_1PAD, 0x00),//0x00008b20,

						/*page program*/ //12H+EDH+32bit address+ write data 4bytes
                		[4*9 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0x12, CMD_DDR, FLEXSPI_8PAD, 0xED),//0x87ed8712,
                		[4*9 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD, 0x20, WRITE_DDR, FLEXSPI_8PAD, 0x04),//0xa3048b20,

						/* Chip Erase (CE) Sequence *///60H+9FH
                		[4*11 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR  , FLEXSPI_8PAD, 0x60, CMD_DDR, FLEXSPI_8PAD, 0x9F),//0x879f8760,

                },
        },
    .pageSize           = 256u,
    .sectorSize         = 4u * 1024u,
    .blockSize          = 64u * 1024u,
    .isUniformBlockSize = false,
};

The board I am working on is a custom one and I will define it as an out-of-tree board, however the above structure is defined in modules/hal/nxp/mcux/mcux-sdk/boards/evkmimxrt1160/xip. Is there a recommended way of adding new boards to hal_nxp?

Ideally I would like to not do that and keep the changes to my local project only.

[DerekSnell]

Hi @rtborg ,
I am glad to hear this is working for you.
An out-of-tree board and keeping all in your local repo is the best option here. Adding a non-NXP board to the hal_nxp is not an option.

I would copy the flash_config file to your local board folder. And update the local CmakeLists.txt file in your board folder to include your local flash_config file.

Best regards