From a07423621578bf62e099a9be3ec1dfbd4f9c68c3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Mon, 29 Jul 2024 20:26:39 +0200
Subject: [PATCH] std.atomic: Don't lie to the compiler about memory clobbers
 in spinLoopHint().

---
 lib/std/atomic.zig | 20 ++++++++------------
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/lib/std/atomic.zig b/lib/std/atomic.zig
index be7203c0cffb..b1aa178eec68 100644
--- a/lib/std/atomic.zig
+++ b/lib/std/atomic.zig
@@ -380,7 +380,7 @@ pub inline fn spinLoopHint() void {
         // https://software.intel.com/content/www/us/en/develop/articles/benefitting-power-and-performance-sleep-loops.html
         .x86,
         .x86_64,
-        => asm volatile ("pause" ::: "memory"),
+        => asm volatile ("pause"),
 
         // No-op instruction that serves as a hardware-thread resource yield hint.
         // https://stackoverflow.com/a/7588941
@@ -388,7 +388,7 @@ pub inline fn spinLoopHint() void {
         .powerpcle,
         .powerpc64,
         .powerpc64le,
-        => asm volatile ("or 27, 27, 27" ::: "memory"),
+        => asm volatile ("or 27, 27, 27"),
 
         // `isb` appears more reliable for releasing execution resources than `yield`
         // on common aarch64 CPUs.
@@ -396,7 +396,7 @@ pub inline fn spinLoopHint() void {
         // https://bugs.mysql.com/bug.php?id=100664
         .aarch64,
         .aarch64_be,
-        => asm volatile ("isb" ::: "memory"),
+        => asm volatile ("isb"),
 
         // `yield` was introduced in v6k but is also available on v6m.
         // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm
@@ -409,30 +409,26 @@ pub inline fn spinLoopHint() void {
                 .has_v6k, .has_v6m,
             });
             if (can_yield) {
-                asm volatile ("yield" ::: "memory");
+                asm volatile ("yield");
             } else {
-                asm volatile ("" ::: "memory");
+                asm volatile ("");
             }
         },
 
         // The 8-bit immediate specifies the amount of cycles to pause for. We can't really be too
         // opinionated here.
         .hexagon,
-        => asm volatile ("pause(#1)" ::: "memory"),
+        => asm volatile ("pause(#1)"),
 
         .riscv32,
         .riscv64,
         => {
             if (comptime std.Target.riscv.featureSetHas(builtin.target.cpu.features, .zihintpause)) {
-                asm volatile ("pause" ::: "memory");
-            } else {
-                asm volatile ("" ::: "memory");
+                asm volatile ("pause");
             }
         },
 
-        // Memory barrier to prevent the compiler from optimizing away the spin-loop
-        // even if no hint_instruction was provided.
-        else => asm volatile ("" ::: "memory"),
+        else => {},
     }
 }