test: Rust code with div, rem, shr signed and unsigned ops

frontend-wasm/src/code_translator/mod.rs

@@ -175,6 +175,9 @@ pub fn translate_operator(
 
         /******************************* Unary Operators *************************************/
         Operator::I32Clz | Operator::I32Ctz => {
+            // Temporary workaround to allow further code translations
+            // until clz and ctz are available in Miden IR
+            // TODO: use the `clz` and `ctz` instructions when they are available
             let val = state.pop1();
             state.push1(builder.ins().popcnt(val, span));
         }

frontend-wasm/tests/expected/signed_arith.mir

@@ -0,0 +1,320 @@
+module noname
+
+pub fn rust_begin_unwind(i32) {
+block0(v0: i32):
+    br block2
+
+block1:
+
+block2:
+    br block2
+
+block3:
+}
+
+pub fn div_s(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+    v3 = const.i32 0  : i32
+    v4 = eq v1, v3  : i1
+    v5 = cast v4  : i32
+    v6 = const.i32 0  : i32
+    v7 = neq v5, v6  : i1
+    condbr v7, block3, block4
+
+block1(v2: i32):
+    v27 = ret v2  : ()
+
+block2:
+    v26 = div v0, v1  : i32
+    br block1(v26)
+
+block3:
+    v21 = const.i32 1048672  : i32
+    v22 = const.i32 25  : i32
+    v23 = const.i32 1048648  : i32
+    call noname::_ZN4core9panicking5panic17h62f53cc4db8dd7b3E(v21, v22, v23)
+    unreachable 
+
+block4:
+    v8 = const.i32 -2147483648  : i32
+    v9 = neq v0, v8  : i1
+    v10 = cast v9  : i32
+    v11 = const.i32 0  : i32
+    v12 = neq v10, v11  : i1
+    condbr v12, block2, block5
+
+block5:
+    v13 = const.i32 -1  : i32
+    v14 = neq v1, v13  : i1
+    v15 = cast v14  : i32
+    v16 = const.i32 0  : i32
+    v17 = neq v15, v16  : i1
+    condbr v17, block2, block6
+
+block6:
+    v18 = const.i32 1048704  : i32
+    v19 = const.i32 31  : i32
+    v20 = const.i32 1048648  : i32
+    call noname::_ZN4core9panicking5panic17h62f53cc4db8dd7b3E(v18, v19, v20)
+    unreachable 
+}
+
+pub fn div_u(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+    v3 = const.i32 0  : i32
+    v4 = eq v1, v3  : i1
+    v5 = cast v4  : i32
+    v6 = const.i32 0  : i32
+    v7 = neq v5, v6  : i1
+    condbr v7, block2, block3
+
+block1(v2: i32):
+
+block2:
+    v13 = const.i32 1048672  : i32
+    v14 = const.i32 25  : i32
+    v15 = const.i32 1048736  : i32
+    call noname::_ZN4core9panicking5panic17h62f53cc4db8dd7b3E(v13, v14, v15)
+    unreachable 
+
+block3:
+    v8 = cast v0  : u32
+    v9 = cast v1  : u32
+    v10 = div v8, v9  : u32
+    v11 = cast v10  : i32
+    v12 = ret v11  : ()
+}
+
+pub fn rem_s(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+    v3 = const.i32 0  : i32
+    v4 = eq v1, v3  : i1
+    v5 = cast v4  : i32
+    v6 = const.i32 0  : i32
+    v7 = neq v5, v6  : i1
+    condbr v7, block3, block4
+
+block1(v2: i32):
+    v27 = ret v2  : ()
+
+block2:
+    v26 = mod v0, v1  : i32
+    br block1(v26)
+
+block3:
+    v21 = const.i32 1048768  : i32
+    v22 = const.i32 57  : i32
+    v23 = const.i32 1048752  : i32
+    call noname::_ZN4core9panicking5panic17h62f53cc4db8dd7b3E(v21, v22, v23)
+    unreachable 
+
+block4:
+    v8 = const.i32 -2147483648  : i32
+    v9 = neq v0, v8  : i1
+    v10 = cast v9  : i32
+    v11 = const.i32 0  : i32
+    v12 = neq v10, v11  : i1
+    condbr v12, block2, block5
+
+block5:
+    v13 = const.i32 -1  : i32
+    v14 = neq v1, v13  : i1
+    v15 = cast v14  : i32
+    v16 = const.i32 0  : i32
+    v17 = neq v15, v16  : i1
+    condbr v17, block2, block6
+
+block6:
+    v18 = const.i32 1048832  : i32
+    v19 = const.i32 48  : i32
+    v20 = const.i32 1048752  : i32
+    call noname::_ZN4core9panicking5panic17h62f53cc4db8dd7b3E(v18, v19, v20)
+    unreachable 
+}
+
+pub fn rem_u(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+    v3 = const.i32 0  : i32
+    v4 = eq v1, v3  : i1
+    v5 = cast v4  : i32
+    v6 = const.i32 0  : i32
+    v7 = neq v5, v6  : i1
+    condbr v7, block2, block3
+
+block1(v2: i32):
+
+block2:
+    v13 = const.i32 1048768  : i32
+    v14 = const.i32 57  : i32
+    v15 = const.i32 1048880  : i32
+    call noname::_ZN4core9panicking5panic17h62f53cc4db8dd7b3E(v13, v14, v15)
+    unreachable 
+
+block3:
+    v8 = cast v0  : u32
+    v9 = cast v1  : u32
+    v10 = mod v8, v9  : u32
+    v11 = cast v10  : i32
+    v12 = ret v11  : ()
+}
+
+pub fn shr_s(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+    v3 = shr v0, v1  : i32
+    br block1(v3)
+
+block1(v2: i32):
+    v4 = ret v2  : ()
+}
+
+pub fn shr_u(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+    v3 = cast v0  : u32
+    v4 = cast v1  : u32
+    v5 = shr v3, v4  : u32
+    v6 = cast v5  : i32
+    br block1(v6)
+
+block1(v2: i32):
+    v7 = ret v2  : ()
+}
+
+pub fn __main() -> i32 {
+block0:
+    v1 = const.i32 -8  : i32
+    v2 = const.i32 -4  : i32
+    v3 = call noname::div_s(v1, v2)  : i32
+    v4 = const.i32 -8  : i32
+    v5 = const.i32 -3  : i32
+    v6 = call noname::rem_s(v4, v5)  : i32
+    v7 = add v3, v6  : i32
+    v8 = const.i32 -16  : i32
+    v9 = const.i32 2  : i32
+    v10 = call noname::shr_s(v8, v9)  : i32
+    v11 = add v7, v10  : i32
+    v12 = const.i32 8  : i32
+    v13 = const.i32 4  : i32
+    v14 = call noname::div_u(v12, v13)  : i32
+    v15 = add v11, v14  : i32
+    v16 = const.i32 8  : i32
+    v17 = const.i32 3  : i32
+    v18 = call noname::rem_u(v16, v17)  : i32
+    v19 = add v15, v18  : i32
+    v20 = const.i32 16  : i32
+    v21 = const.i32 2  : i32
+    v22 = call noname::shr_u(v20, v21)  : i32
+    v23 = add v19, v22  : i32
+    br block1(v23)
+
+block1(v0: i32):
+    v24 = ret v0  : ()
+}
+
+pub fn _ZN4core3ptr37drop_in_place$LT$core..fmt..Error$GT$17h282a1f10dc7e004dE(i32) {
+block0(v0: i32):
+    br block1
+
+block1:
+    v1 = ret   : ()
+}
+
+pub fn _ZN4core9panicking9panic_fmt17h9f61a1f2faa523f9E(i32, i32) {
+block0(v0: i32, v1: i32):
+    v2 = const.i32 0  : i32
+    v3 = global.load (@__stack_pointer) as *mut i8  : i32
+    v4 = const.i32 32  : i32
+    v5 = sub v3, v4  : i32
+    v6 = global.symbol @__stack_pointer  : *mut i8
+    v7 = ptrtoint v6  : i32
+    v8 = inttoptr v7  : *mut i32
+    store v8, v5
+    v9 = const.i32 24  : i32
+    v10 = add v5, v9  : i32
+    v11 = inttoptr v10  : *mut i32
+    store v11, v0
+    v12 = const.i32 1048896  : i32
+    v13 = const.i32 16  : i32
+    v14 = add v5, v13  : i32
+    v15 = inttoptr v14  : *mut i32
+    store v15, v12
+    v16 = const.i32 1048896  : i32
+    v17 = const.i32 12  : i32
+    v18 = add v5, v17  : i32
+    v19 = inttoptr v18  : *mut i32
+    store v19, v16
+    v20 = const.i32 1  : i32
+    v21 = trunc v20  : i8
+    v22 = const.i32 28  : i32
+    v23 = add v5, v22  : i32
+    v24 = inttoptr v23  : *mut i8
+    store v24, v21
+    v25 = const.i32 20  : i32
+    v26 = add v5, v25  : i32
+    v27 = inttoptr v26  : *mut i32
+    store v27, v1
+    v28 = const.i32 12  : i32
+    v29 = add v5, v28  : i32
+    call noname::rust_begin_unwind(v29)
+    unreachable 
+
+block1:
+}
+
+pub fn _ZN4core9panicking5panic17h62f53cc4db8dd7b3E(i32, i32, i32) {
+block0(v0: i32, v1: i32, v2: i32):
+    v3 = const.i32 0  : i32
+    v4 = global.load (@__stack_pointer) as *mut i8  : i32
+    v5 = const.i32 32  : i32
+    v6 = sub v4, v5  : i32
+    v7 = global.symbol @__stack_pointer  : *mut i8
+    v8 = ptrtoint v7  : i32
+    v9 = inttoptr v8  : *mut i32
+    store v9, v6
+    v10 = const.i32 12  : i32
+    v11 = add v6, v10  : i32
+    v12 = const.i64 0  : i64
+    v13 = inttoptr v11  : *mut i64
+    store v13, v12
+    v14 = const.i32 1  : i32
+    v15 = const.i32 4  : i32
+    v16 = add v6, v15  : i32
+    v17 = inttoptr v16  : *mut i32
+    store v17, v14
+    v18 = const.i32 1048896  : i32
+    v19 = const.i32 8  : i32
+    v20 = add v6, v19  : i32
+    v21 = inttoptr v20  : *mut i32
+    store v21, v18
+    v22 = const.i32 28  : i32
+    v23 = add v6, v22  : i32
+    v24 = inttoptr v23  : *mut i32
+    store v24, v1
+    v25 = const.i32 24  : i32
+    v26 = add v6, v25  : i32
+    v27 = inttoptr v26  : *mut i32
+    store v27, v0
+    v28 = const.i32 24  : i32
+    v29 = add v6, v28  : i32
+    v30 = inttoptr v6  : *mut i32
+    store v30, v29
+    call noname::_ZN4core9panicking9panic_fmt17h9f61a1f2faa523f9E(v6, v2)
+    unreachable 
+
+block1:
+}
+
+pub fn _ZN36_$LT$T$u20$as$u20$core..any..Any$GT$7type_id17h29327df37c6e3023E(i32, i32) {
+block0(v0: i32, v1: i32):
+    v2 = const.i64 -1688046730280208939  : i64
+    v3 = const.i32 8  : i32
+    v4 = add v0, v3  : i32
+    v5 = inttoptr v4  : *mut i64
+    store v5, v2
+    v6 = const.i64 -2518113060735759681  : i64
+    v7 = inttoptr v0  : *mut i64
+    store v7, v6
+    br block1
+
+block1:
+    v8 = ret   : ()
+}