Layout Resources
Shanthi Pavan: Noise in Cascodes, Layout Considerations and Multi-finger Transistors
Cheat sheet of commands used in Brad Minch's tutorial:
| Command | Description |
|---|---|
| left click | lower left corner |
| right click | upper right corner |
| b | box dimensions macro, can also enter :box |
| :grid 0.05um 0.05um | |
| :grid | turns grid lines off) |
| :snap user | user grid for snapping |
| :drc style drc(full) | check all design rules |
| z | zoom in |
| shift Z | zoom out |
| ctrl z | zoom to box |
| arrow keys | panning |
| :paint poly | |
| middle click | on poly to copy poly onto the selected box area. Or middle-click on poly from the palette. |
| white dots indicate DRC violations | |
| :drc why | DRC violation for box selection |
| :erase poly | also, just erase would erase through all layers |
| :paint ndiff | n diffusion, note that the background (substrate) is p-type |
| ntran where poly crosses n diffusion | |
| P-tap is just a p contact | |
| :paint ndc | n diffusion contact |
| :paint li | local interconnect (on top of contact) |
| :paint psd | p substrate diffusion |
| :paint psc | p substrate contact |
| s | select entire cell (make box coincident with entire cell) |
| :select area | select all geometry inside box/cell |
| :copy n 30 | arguments: compass direction (north) and distance (30 units of 0.5um grid = 1.5um from bottom edge of selected area) |
| :paint nwell | over an n-channel transistor automatically flips the nfet to pfet, then extend the nwell |
| :move n 1 | do a :select area first |
| . | dot key to repeat the action (does this work?) |
| u | undo |
| :paint pc | poly contact |
| :paint m1 | metal1 |
| :paint mcon | |
| s | flashing a net / node, can be hit multiple times, can go inside cells (comes up later) |
| :label A w | name, direction. Left and right click in one spot to get a zero height box. Small font size. |
| :port make | yellow A -> blue A |
| :label VP w m1 | also specify layer for the label (and thus the port to follow) |
| :save inverter | |
| :port remove | delete the port in selected box |
| :erase label | delete the label in selected box |
| Cell > New | |
| :getcell inverter | note: must first select a box in the new buffer cell |
| x | reveal contents of the cell (click mouse over the cell) |
| shift X | hide cell contents |
| Use ports at the top level for simulating, but just labels are ok for LVS (else we get subcircuits) | |
| :save | |
| :extract all | extract nmos, pmos, diodes, capacitors, resistors. Could extract parasitics of interconnects etc |
| :ext2spice hierarchy on | |
| :ext2spice scale off | |
| :ext2spice |