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Add aarch64 library variants for no-unaligned-access (#572)
This introduces new library variants for aarch64 to support targets where unaligned memory accesses are disabled. To enable these changes a patch to picolibc was required, ensuring the assembly implemenation that relies on unaligned accesses is not used when __ARM_FEATURE_UNALIGNED is not defined. Co-authored by: @pratlucas ( (#567) --------- Co-authored-by: Lucas Prates <[email protected]>
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@@ -0,0 +1,40 @@ | ||
{ | ||
"args": { | ||
"common": { | ||
"TARGET_ARCH": "aarch64a", | ||
"VARIANT": "aarch64a_strictalign", | ||
"COMPILE_FLAGS": "-march=armv8-a -mno-unaligned-access", | ||
"ENABLE_EXCEPTIONS": "OFF", | ||
"ENABLE_RTTI": "OFF", | ||
"TEST_EXECUTOR": "fvp", | ||
"FVP_MODEL": "aem-a", | ||
"FVP_CONFIG": "v8a-aarch64", | ||
"BOOT_FLASH_ADDRESS": "0x80000000", | ||
"BOOT_FLASH_SIZE": "0x1000", | ||
"FLASH_ADDRESS": "0x80001000", | ||
"FLASH_SIZE": "0xfff000", | ||
"RAM_ADDRESS": "0x81000000", | ||
"RAM_SIZE": "0x1000000", | ||
"STACK_SIZE": "8K" | ||
}, | ||
"picolibc": { | ||
"PICOLIBC_BUILD_TYPE": "release", | ||
"ENABLE_CXX_LIBS": "ON", | ||
"ENABLE_LIBC_TESTS": "ON", | ||
"ENABLE_COMPILER_RT_TESTS": "OFF", | ||
"ENABLE_LIBCXX_TESTS": "OFF" | ||
}, | ||
"newlib": { | ||
"ENABLE_CXX_LIBS": "ON", | ||
"ENABLE_LIBC_TESTS": "OFF", | ||
"ENABLE_COMPILER_RT_TESTS": "OFF", | ||
"ENABLE_LIBCXX_TESTS": "OFF" | ||
}, | ||
"llvmlibc": { | ||
"ENABLE_CXX_LIBS": "OFF", | ||
"ENABLE_LIBC_TESTS": "OFF", | ||
"ENABLE_COMPILER_RT_TESTS": "OFF", | ||
"ENABLE_LIBCXX_TESTS": "OFF" | ||
} | ||
} | ||
} |
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arm-multilib/json/variants/aarch64a_strictalign_exn_rtti.json
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@@ -0,0 +1,40 @@ | ||
{ | ||
"args": { | ||
"common": { | ||
"TARGET_ARCH": "aarch64a", | ||
"VARIANT": "aarch64a_strictalign_exn_rtti", | ||
"COMPILE_FLAGS": "-march=armv8-a -mno-unaligned-access", | ||
"ENABLE_EXCEPTIONS": "ON", | ||
"ENABLE_RTTI": "ON", | ||
"TEST_EXECUTOR": "fvp", | ||
"FVP_MODEL": "aem-a", | ||
"FVP_CONFIG": "v8a-aarch64", | ||
"BOOT_FLASH_ADDRESS": "0x80000000", | ||
"BOOT_FLASH_SIZE": "0x1000", | ||
"FLASH_ADDRESS": "0x80001000", | ||
"FLASH_SIZE": "0xfff000", | ||
"RAM_ADDRESS": "0x81000000", | ||
"RAM_SIZE": "0x1000000", | ||
"STACK_SIZE": "8K" | ||
}, | ||
"picolibc": { | ||
"PICOLIBC_BUILD_TYPE": "release", | ||
"ENABLE_CXX_LIBS": "ON", | ||
"ENABLE_LIBC_TESTS": "ON", | ||
"ENABLE_COMPILER_RT_TESTS": "OFF", | ||
"ENABLE_LIBCXX_TESTS": "OFF" | ||
}, | ||
"newlib": { | ||
"ENABLE_CXX_LIBS": "ON", | ||
"ENABLE_LIBC_TESTS": "OFF", | ||
"ENABLE_COMPILER_RT_TESTS": "OFF", | ||
"ENABLE_LIBCXX_TESTS": "OFF" | ||
}, | ||
"llvmlibc": { | ||
"ENABLE_CXX_LIBS": "OFF", | ||
"ENABLE_LIBC_TESTS": "OFF", | ||
"ENABLE_COMPILER_RT_TESTS": "OFF", | ||
"ENABLE_LIBCXX_TESTS": "OFF" | ||
} | ||
} | ||
} |
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@@ -1,7 +1,7 @@ | ||
From 42f07bef7775a1387f9707e959f8b6782f9d6808 Mon Sep 17 00:00:00 2001 | ||
From 028fe75e045951a9d091008a85971523358160db Mon Sep 17 00:00:00 2001 | ||
From: Simi Pallipurath <[email protected]> | ||
Date: Thu, 14 Nov 2024 10:07:08 +0000 | ||
Subject: [PATCH 1/2] [PATCH 1/2] Enable libcxx builds | ||
Subject: Enable libcxx builds | ||
|
||
Modifications to build config and linker script required to enable | ||
libc++ builds. | ||
|
@@ -47,3 +47,6 @@ index 7b63ba172..cda5e1e7e 100644 | |
*(.gnu.linkonce.t.*) | ||
KEEP (*(.fini .fini.*)) | ||
@PREFIX@__text_end = .; | ||
-- | ||
2.39.5 (Apple Git-154) | ||
|
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@@ -1,7 +1,7 @@ | ||
From 3b0b62ce6d81211a71eebe63b4b4ef0732da93ef Mon Sep 17 00:00:00 2001 | ||
From 58451642e678817d8822b04b8ff07ee4758a8f10 Mon Sep 17 00:00:00 2001 | ||
From: Simi Pallipurath <[email protected]> | ||
Date: Mon, 25 Nov 2024 11:13:50 +0000 | ||
Subject: [PATCH 2/2] [PATCH 2/2] Add bootcode for AArch64 FVPs | ||
Date: Thu, 14 Nov 2024 10:12:33 +0000 | ||
Subject: Add bootcode for AArch64 FVPs | ||
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||
The AArch64 FVP (Fixed Virtual Platform) models differ from QEMU in a | ||
few ways which affect the crt0 code: | ||
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@@ -886,4 +886,3 @@ index 76965990f..be8f875be 100644 | |
endforeach | ||
-- | ||
2.34.1 | ||
|
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