Disclaimer: Please read the MLCAD Contest description file available in this repository, which describes the contest, before looking into the benchmarks and scripts available in this repository. The README file only helps navigate and understand the benchmarks and scripts; it does not serve as the contest description.
This GitHub repository has the public benchmarks for the 2025 MLCAD CAD Contest to perform physical-aware logic resynthesis. The hidden benchmarks will be released after the contest. This contest's primary goal is to explore the state-of-the-art algorithms for physical-aware resynthesis to drive academic research to generate scalable algorithms for gate sizing, gate cloning, buffer insertion or removal, Vt swapping, and logic restructuring using ML (supervised, unsupervised, or reinforcement learning-based techniques). The secondary goal is to allow the use of a recently developed ML EDA research infrastructure that leverages OpenROAD's Python API and Nvidia's CircuitOps data representation format for ML-EDA or GPU-accelerated EDA research. OpenROAD's Python APIs allow users to execute EDA tools with just a few lines of Python code and to access the EDA tool database directly through Python APIs, bypassing traditional file I/O. CircuitOps provides an ML-friendly data infrastructure that uses Labeled Property Graphs (LPGs) backed by Intermediate Representation (IR) Tables to create datasets for ML-EDA applications. The Python-compatible LPG minimizes the developmental effort required for ML-EDA research.
- MLCAD2025-Contest-Problem-Statement.pdf: Contest description.
- design: Synthesized netlist, floorplan DEF, SDC and the IR tables.
- platform/ASAP7: ASAP7 cell library for the designs.
- src
- example: Example scripts showing how to use OpenROAD Python API and CircuitOps LPG to do operations.
- IR_tables_generator: Python scripts to generate the intermediate files containing the updated timing values and capacitance values using OpenROAD after gate sizing.
- evaluation: Evaluation scripts for the contest and the evaluation method for users of the OpenROAD Python API.
- R. Liang, A. Agnesina, G. Pradipta, V. A. Chhabria and H. Ren, "Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization," in ICCAD, 2023
- V. A. Chhabria, W. Jiang, A. B. Kahng, R. Liang, H. Ren, S. S. Sapatnekar and B.-Y. Wu, "OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education," in VTS, 2024
- CircuitOps and OpenROAD Python API Tutorial at ASP-DAC 2024
- OpenROAD GitHub repository
- CircuitOps GitHub repository
The following technique assumes you have docker installed on your machine. You can install docker from here. Build the docker image and run using the following commands:
docker build -t <image_name>.
docker run -it --name <container_name> <image_name>
The following technique assumes you have a machine with the required Ubuntu OS prerequisite of OpenROAD and CircuitOps.
Install dependencies for OpenROAD:
sudo ./OpenROAD/etc/DependencyInstaller.sh
Install dependencies for CircuitOps and ML EDA applications:
sudo apt-get install -y python3-matplotlib
sudo apt-get install -y nvidia-cuda-toolkit
sudo apt-get update
sudo apt-get install -y python3-graph-tool
sudo apt-get update && apt-get install -y gnupg2 ca-certificates
sudo apt-get install -y python3-pip
pip3 install --no-cache-dir torch==2.2.0
pip3 install numpy==1.24.4
pip3 install dgl==0.9.1
pip3 install pandas
pip3 install networkx==2.6.3
pip3 install scikit-learn
pip3 install tqdm==4.53.0
Once packages have been installed, build OpenROAD:
cd ./OpenROAD/
mkdir build
cd build
cmake ..
make -j
Design | Gate count | Clock period (ns) | WNS (ns) | TNS (ns) | Total slew violation difference (ns) | Slew violation count | Total load capacitance violation difference (fF) | Capacitance violation count | Total leakge power (uW) | Total overflow |
---|---|---|---|---|---|---|---|---|---|---|
ac97_top * | 8029 | 0.08 | -0.108 | -84.999 | 0.506 | 15 | 0.000 | 0 | 82.793 | 0 |
aes_cipher_top | 10965 | 0.26 | -0.221 | -45.155 | 9.769 | 183 | 6.589 | 5 | 29.763 | 0 |
NV_NVDLA_partition_m | 17843 | 0.40 | -0.209 | -11.906 | 54.497 | 368 | 344.927 | 9 | 161.323 | 0 |
fpu * | 19725 | 3.68 | -1.208 | -59.335 | 23.786 | 124 | 4.546 | 1 | 19.254 | 0 |
NV_NVDLA_partition_p* | 60698 | 0.50 | -0.302 | -1528.167 | 891.754 | 8786 | 7209.348 | 109 | 590.814 | 0 |
(Reported by OpenSTA)
* - These designs are subject to change and will be finalized shortly.