ARM: dts: qcom: Correct the qcom,ipc no for wcnss_smsm

The qcom,ipc number of wcnss_smsm is set incorrectly. This leads to incorrect parsing in smsm_parse_ipc logic and interrupt line for wcnss_smsm is not set. Change-Id: I86822c11edd22a80a9a21e190a6b9d9254ed2ca3 CRs-Fixed: 2767389 Signed-off-by: Surabhi Vishnoi <[email protected]>
AndroidBlobs · Sep 6, 2020 · 14a522a · 14a522a
1 parent 6435cd8
commit 14a522a
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/arch/arm64/boot/dts/qcom/sdm429.dtsi b/arch/arm64/boot/dts/qcom/sdm429.dtsi
@@ -1097,7 +1097,7 @@
 
 		qcom,ipc-1 = <&apcs 0 13>;
 		qcom,ipc-2 = <&apcs 0 9>;
-		qcom,ipc-6 = <&apcs 0 19>;
+		qcom,ipc-3 = <&apcs 0 19>;
 
 		apps_smsm: apps@0 {
 			reg = <0>;
@@ -1118,8 +1118,8 @@
 			#interrupt-cells = <2>;
 		};
 
-		wcnss_smsm: wcnss@6 {
-			reg = <6>;
+		wcnss_smsm: wcnss@3 {
+			reg = <3>;
 			interrupts = <0 144 IRQ_TYPE_EDGE_RISING>;
 			interrupt-controller;
 			#interrupt-cells = <2>;