Merge remote-tracking branch 'origin/aspeed-dev' into aspeed-master

Signed-off-by: Jamin Lin <[email protected]> Change-Id: Ifa35ad854e76f4d7ff6e22c183a66f9153311704
AspeedTech-BMC · Apr 28, 2023 · 6a85b68 · 6a85b68
2 parents a0aee8d + 88f0bd0
commit 6a85b68
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Showing 132 changed files with 3,938 additions and 2,292 deletions.
diff --git a/apps/aspeed-pfr/CMakeLists.txt b/apps/aspeed-pfr/CMakeLists.txt
@@ -4,7 +4,7 @@
 cmake_minimum_required(VERSION 3.13.1)
 
 find_package(Zephyr HINTS $ENV{ZEPHYR_BASE})
-project(aspeed-pfr VERSION 01.04 LANGUAGES C)
+project(aspeed-pfr VERSION 01.05 LANGUAGES C)
 
 set(PROJECT_VERSION_MAJOR ${CMAKE_PROJECT_VERSION_MAJOR})
 set(PROJECT_VERSION_MINOR ${CMAKE_PROJECT_VERSION_MINOR})

diff --git a/apps/aspeed-pfr/Kconfig b/apps/aspeed-pfr/Kconfig
@@ -130,11 +130,17 @@ config BMC_PCH_STAGING_SIZE
 	  The max size of PCH staging area for putting signed PCH capsule.
 
 config BMC_PFR_STAGING_SIZE
-	default 0x500000
+	default 0x100000
 	hex "PFR staging region size in BMC flash"
 	help
 	  The max size of PFR staging area for putting signed ROT capsule.
 
+config BMC_CPLD_STAGING_SIZE
+	default 0x400000
+	hex "Platform CPLD staging region size in BMC flash"
+	help
+	  The max size of platform CPLD staging area for putting signed CPLD capsule.
+
 config PCH_STAGING_SIZE
 	default 0x1000000
 	hex "PCH staging region size in PCH flash"
@@ -178,6 +184,13 @@ config PFR_SW_MAILBOX
         help
           Enable SW mailbox support.
 
+config KEY_MANIFEST_MAX_COUNT
+	depends on CERBERUS_PFR
+	default 0x10
+	hex "Key manifest max count"
+	help
+	  The max count of key manifest for Cerberus PFR.
+
 rsource "Kconfig.spdm"
 
 config PFR_DEBUG_SHELL

diff --git a/apps/aspeed-pfr/boards/ast1060_dcscm.conf b/apps/aspeed-pfr/boards/ast1060_dcscm.conf
@@ -16,7 +16,8 @@ CONFIG_I2C_SWMBX_SLAVE=y
 CONFIG_PLATFORM_STATE_LED=y
 CONFIG_BMC_STAGING_SIZE=0x3de0000
 CONFIG_BMC_PCH_STAGING_SIZE=0x1000000
-CONFIG_BMC_PFR_STAGING_SIZE=0x500000
+CONFIG_BMC_PFR_STAGING_SIZE=0x100000
+CONFIG_BMC_CPLD_STAGING_SIZE=0x400000
 CONFIG_PCH_STAGING_SIZE=0x1000000
 
 CONFIG_INTEL_PFR=y

diff --git a/apps/aspeed-pfr/boards/ast1060_dcscm.overlay b/apps/aspeed-pfr/boards/ast1060_dcscm.overlay
@@ -63,12 +63,6 @@
 	status = "okay";
 };
 
-// for i2c filter testing
-&i2c8 {
-	pinctrl-0 = <&pinctrl_i2c8_default>;
-	status = "okay";
-};
-
 #if 0
 // For mctp over i3c
 // AST2600 i3c-1 -> AST1060 i3c-2
@@ -210,13 +204,13 @@
 };
 
 &spi2_cs0 {
-	spi-max-buswidth = <4>;
+	spi-max-buswidth = <1>;
 	spi-max-frequency = <50000000>;
 	status = "okay";
 };
 
 &spi2_cs1 {
-	spi-max-buswidth = <4>;
+	spi-max-buswidth = <1>;
 	spi-max-frequency = <50000000>;
 	status = "okay";
 };
@@ -255,7 +249,7 @@
 	log-ram-size = <0x200>;
 	pinctrl-0 = <&pinctrl_spim3_cs &pinctrl_spim3_in_default &pinctrl_spim3_out_default
 		&pinctrl_spim3_qspi_in_default &pinctrl_spim3_qspi_out_default
-		&pinctrl_spim3_muxsel &pinctrl_spim3_rst_out>;
+		&pinctrl_spim3_muxsel>;
 
 	flash-device = <&spi2_cs0>;
 	ext-mux-sel = <1>;
@@ -270,7 +264,7 @@
 	log-ram-size = <0x200>;
 	pinctrl-0 = <&pinctrl_spim4_cs &pinctrl_spim4_in_default &pinctrl_spim4_out_default
 		&pinctrl_spim4_qspi_in_default &pinctrl_spim4_qspi_out_default
-		&pinctrl_spim4_muxsel &pinctrl_spim4_rst_out>;
+		&pinctrl_spim4_muxsel>;
 
 	flash-device = <&spi2_cs1>;
 	ext-mux-sel = <1>;

diff --git a/apps/aspeed-pfr/boards/ast1060_dcscm_amd.conf b/apps/aspeed-pfr/boards/ast1060_dcscm_amd.conf
@@ -16,7 +16,9 @@ CONFIG_I2C_SWMBX_SLAVE=y
 CONFIG_PLATFORM_STATE_LED=y
 CONFIG_BMC_STAGING_SIZE=0x4000000
 CONFIG_BMC_PCH_STAGING_SIZE=0x2000000
-CONFIG_BMC_PFR_STAGING_SIZE=0x500000
+CONFIG_BMC_PFR_STAGING_SIZE=0x100000
+CONFIG_BMC_CPLD_STAGING_SIZE=0x400000
 CONFIG_BMC_PFR_STAGING_OFFSET=0xe000000
 CONFIG_PCH_STAGING_SIZE=0xf10000
+CONFIG_KEY_MANIFEST_MAX_COUNT=0x10
 
diff --git a/apps/aspeed-pfr/boards/ast1060_dcscm_amd.overlay b/apps/aspeed-pfr/boards/ast1060_dcscm_amd.overlay
@@ -63,12 +63,6 @@
 	status = "okay";
 };
 
-// for i2c filter testing
-&i2c8 {
-	pinctrl-0 = <&pinctrl_i2c8_default>;
-	status = "okay";
-};
-
 &wdt0 {
 	status = "okay";
 };

diff --git a/apps/aspeed-pfr/boards/ast1060_dcscm_dice.conf b/apps/aspeed-pfr/boards/ast1060_dcscm_dice.conf
@@ -16,7 +16,8 @@ CONFIG_I2C_SWMBX_SLAVE=y
 CONFIG_PLATFORM_STATE_LED=y
 CONFIG_BMC_STAGING_SIZE=0x3de0000
 CONFIG_BMC_PCH_STAGING_SIZE=0x1000000
-CONFIG_BMC_PFR_STAGING_SIZE=0x500000
+CONFIG_BMC_PFR_STAGING_SIZE=0x100000
+CONFIG_BMC_CPLD_STAGING_SIZE=0x400000
 CONFIG_PCH_STAGING_SIZE=0x1000000
 
 CONFIG_INTEL_PFR=y

diff --git a/apps/aspeed-pfr/boards/ast1060_dcscm_dice.overlay b/apps/aspeed-pfr/boards/ast1060_dcscm_dice.overlay
@@ -63,12 +63,6 @@
 	status = "okay";
 };
 
-// for i2c filter testing
-&i2c8 {
-	pinctrl-0 = <&pinctrl_i2c8_default>;
-	status = "okay";
-};
-
 #if 0
 // For mctp over i3c
 // AST2600 i3c-1 -> AST1060 i3c-2

diff --git a/apps/aspeed-pfr/boards/ast1060_dcscm_gpio_common.dts b/apps/aspeed-pfr/boards/ast1060_dcscm_gpio_common.dts
@@ -27,6 +27,7 @@
 		led1 = &pfr_fp_amber_led_out;
 		fp-input0 = &bmc_fp_green_led_in;
 		fp-input1 = &bmc_fp_amber_led_in;
+		hbled0 = &pfr_hb_led_out;
 	};
 
 	gpio_keys {
@@ -54,6 +55,11 @@
 			gpios = <&gpio0_e_h 25 1>; /* GPIO_H1 */
 			label = "PFR_FP_AMBER_LED";
 		};
+
+		pfr_hb_led_out: hb_led {
+			gpios = <&gpio0_i_l 12 1>; /* GPIO_J4 */
+			label = "PFR_HB_LED";
+		};
 	};
 };
 
diff --git a/apps/aspeed-pfr/boards/ast1060_dual_flash.conf b/apps/aspeed-pfr/boards/ast1060_dual_flash.conf
@@ -16,7 +16,8 @@ CONFIG_ASPEED_DC_SCM=y
 CONFIG_DUAL_FLASH=y
 CONFIG_BMC_STAGING_SIZE=0x3de0000
 CONFIG_BMC_PCH_STAGING_SIZE=0x1000000
-CONFIG_BMC_PFR_STAGING_SIZE=0x500000
+CONFIG_BMC_PFR_STAGING_SIZE=0x100000
+CONFIG_BMC_CPLD_STAGING_SIZE=0x400000
 CONFIG_PCH_STAGING_SIZE=0x1000000
 
 # Intel PFR 3.0

diff --git a/apps/aspeed-pfr/boards/ast1060_dual_flash.overlay b/apps/aspeed-pfr/boards/ast1060_dual_flash.overlay
@@ -68,12 +68,6 @@
 	status = "okay";
 };
 
-// for i2c filter testing
-&i2c8 {
-	pinctrl-0 = <&pinctrl_i2c8_default>;
-	status = "okay";
-};
-
 &wdt0 {
 	status = "okay";
 };

diff --git a/apps/aspeed-pfr/boards/ast1060_dual_flash_amd.conf b/apps/aspeed-pfr/boards/ast1060_dual_flash_amd.conf
@@ -16,7 +16,9 @@ CONFIG_ASPEED_DC_SCM=y
 CONFIG_DUAL_FLASH=y
 CONFIG_BMC_STAGING_SIZE=0x4000000
 CONFIG_BMC_PCH_STAGING_SIZE=0x2000000
-CONFIG_BMC_PFR_STAGING_SIZE=0x500000
+CONFIG_BMC_PFR_STAGING_SIZE=0x100000
+CONFIG_BMC_CPLD_STAGING_SIZE=0x400000
 CONFIG_BMC_PFR_STAGING_OFFSET=0xe000000
 CONFIG_PCH_STAGING_SIZE=0xf10000
+CONFIG_KEY_MANIFEST_MAX_COUNT=0x10
 
diff --git a/apps/aspeed-pfr/boards/ast1060_dual_flash_amd.overlay b/apps/aspeed-pfr/boards/ast1060_dual_flash_amd.overlay
@@ -68,12 +68,6 @@
 	status = "okay";
 };
 
-// for i2c filter testing
-&i2c8 {
-	pinctrl-0 = <&pinctrl_i2c8_default>;
-	status = "okay";
-};
-
 &wdt0 {
 	status = "okay";
 };

diff --git a/apps/aspeed-pfr/boards/ast1060_dual_flash_dice.conf b/apps/aspeed-pfr/boards/ast1060_dual_flash_dice.conf
@@ -18,7 +18,8 @@ CONFIG_ASPEED_DC_SCM=y
 CONFIG_DUAL_FLASH=y
 CONFIG_BMC_STAGING_SIZE=0x3de0000
 CONFIG_BMC_PCH_STAGING_SIZE=0x1000000
-CONFIG_BMC_PFR_STAGING_SIZE=0x500000
+CONFIG_BMC_PFR_STAGING_SIZE=0x100000
+CONFIG_BMC_CPLD_STAGING_SIZE=0x400000
 CONFIG_PCH_STAGING_SIZE=0x1000000
 
 CONFIG_INTEL_PFR=y

diff --git a/apps/aspeed-pfr/boards/ast1060_dual_flash_dice.overlay b/apps/aspeed-pfr/boards/ast1060_dual_flash_dice.overlay
@@ -68,12 +68,6 @@
 	status = "okay";
 };
 
-// for i2c filter testing
-&i2c8 {
-	pinctrl-0 = <&pinctrl_i2c8_default>;
-	status = "okay";
-};
-
 &wdt0 {
 	status = "okay";
 };

diff --git a/apps/aspeed-pfr/boards/ast1060_evb.conf b/apps/aspeed-pfr/boards/ast1060_evb.conf
@@ -15,6 +15,7 @@ CONFIG_I2C_SWMBX_SLAVE=y
 CONFIG_SPI_MUX_INVERSE=y
 CONFIG_BMC_STAGING_SIZE=0x2000000
 CONFIG_BMC_PCH_STAGING_SIZE=0x1000000
-CONFIG_BMC_PFR_STAGING_SIZE=0x500000
+CONFIG_BMC_PFR_STAGING_SIZE=0x100000
+CONFIG_BMC_CPLD_STAGING_SIZE=0x400000
 CONFIG_PCH_STAGING_SIZE=0x1000000
 CONFIG_OTP_ASPEED=y
diff --git a/apps/aspeed-pfr/boards/ast1060_evb.overlay b/apps/aspeed-pfr/boards/ast1060_evb.overlay
@@ -63,12 +63,6 @@
 	status = "okay";
 };
 
-// for i2c filter testing
-&i2c8 {
-	pinctrl-0 = <&pinctrl_i2c8_default>;
-	status = "okay";
-};
-
 &wdt0 {
 	status = "okay";
 };

diff --git a/apps/aspeed-pfr/prj.conf b/apps/aspeed-pfr/prj.conf
@@ -33,6 +33,7 @@ CONFIG_MBEDTLS_BUILTIN=y
 CONFIG_MBEDTLS_ECDSA_C=y
 CONFIG_MBEDTLS_ECP_C=y
 CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y
 CONFIG_MBEDTLS_HASH_SHA384_ENABLED=y
 CONFIG_MBEDTLS_MAC_SHA1_ENABLED=y
 CONFIG_MBEDTLS_MAC_SHA384_ENABLED=y
@@ -75,3 +76,7 @@ CONFIG_LOG_STRDUP_BUF_COUNT=16
 # Set to N in production
 CONFIG_PFR_DEBUG_SHELL=y
 
+CONFIG_I2C_ASPEED_SHELL=y
+
+# Set to Y for JTAG debugging
+# CONFIG_DEBUG_THREAD_INFO=y