This repository hosts the code for SIFT feature detection, description, and matching running on Altera DE2-i150 FPGA board. The matching method is a brute-force approach.
The code has been archived since 2020. Probably no change will be made in the future.
Please refer to the following papers for more information:
Chien, Chiang-Heng, Chiang-Ju Chien, and Chen-Chien Hsu. "Hardware-software co-design of an image feature extraction and matching algorithm." In 2019 2nd International Conference on Intelligent Autonomous Systems (ICoIAS), pp. 37-41. IEEE, 2019.
Li, Shih-An, Wei-Yen Wang, Wei-Zheng Pan, Chen-Chien James Hsu, and Cheng-Kai Lu. "FPGA-based hardware design for scale-invariant feature transform." IEEE Access 6 (2018): 43850-43864.