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feat(build): enable component synth for Agilex 3 devices #7

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feat(build): enable component synth for Agilex 3 devices #7

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1 change: 1 addition & 0 deletions build/targets/comp_quartus.tcl
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Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,7 @@ if {![info exists SYNTH_FLAGS(FPGA)]} {
}
set SYNTH_FLAGS(FPGA) [string map {
"STRATIX10" "1SD280PT2F55E1VG"
"AGILEX3" "A3CZ135BB18AE7S"
"AGILEX" "AGIB027R29A1E2VR0"
} $SYNTH_FLAGS(DEVICE)]
}
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