Skip to content

Commit

Permalink
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Merge branch 'smartsim-refactor' of https://github.com/CrayLabs/SmartSim
Browse files Browse the repository at this point in the history
 into cmdgen
Julia Putko committed Jul 15, 2024
2 parents 240d453 + c2164ca commit e88fd3e
Showing 267 changed files with 11,068 additions and 7,760 deletions.
2 changes: 2 additions & 0 deletions .github/workflows/build_docs.yml
Original file line number Diff line number Diff line change
@@ -32,6 +32,8 @@ on:
push:
branches:
- develop
branches-ignore:
- smartsim-refactor

jobs:
build_docs:
2 changes: 2 additions & 0 deletions .github/workflows/changelog.yml
Original file line number Diff line number Diff line change
@@ -30,6 +30,8 @@ name: enforce_changelog

on:
pull_request:
branches-ignore:
- smartsim-refactor
push:
branches:
- develop
5 changes: 3 additions & 2 deletions .github/workflows/run_tests.yml
Original file line number Diff line number Diff line change
@@ -124,8 +124,9 @@ jobs:
python -m pip install .[mypy]
make check-mypy
- name: Run Pylint
run: make check-lint
# TODO: Re-enable static analysis once API is firmed up
# - name: Run Pylint
# run: make check-lint

# Run isort/black style check
- name: Run isort
2 changes: 1 addition & 1 deletion .pylintrc
Original file line number Diff line number Diff line change
@@ -167,7 +167,7 @@ max-module-lines=1000

# Allow the body of a class to be on the same line as the declaration if body
# contains single statement.
single-line-class-stmt=no
single-line-class-stmt=yes

# Allow the body of an if to be on the same line as the test if there is no
# else.
Loading

0 comments on commit e88fd3e

Please sign in to comment.