MIPS_tb.v.out

#! /usr/local/iverilog/bin/vvp
:ivl_version "11.0 (devel)" "(s20150603-642-g3bdb50da)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "system";
:vpi_module "vhdl_sys";
:vpi_module "vhdl_textio";
:vpi_module "v2005_math";
:vpi_module "va_math";
S_00000000008cb380 .scope module, "mips_testbench" "mips_testbench" 2 3;
 .timescale 0 0;
v000000000091b720_0 .var "clock", 0 0;
S_00000000008a72c0 .scope module, "Datapath" "mips_core" 2 8, 3 11 0, S_00000000008cb380;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clock";
RS_00000000008d72a8 .resolv tri, v00000000008ca8e0_0, v0000000000919a30_0;
v000000000091bb80_0 .net8 "Branch", 0 0, RS_00000000008d72a8;  2 drivers
v000000000091c260_0 .net "MemRead", 0 0, v000000000091a610_0;  1 drivers
v000000000091b7c0_0 .net "MemWrite", 0 0, v0000000000919df0_0;  1 drivers
v000000000091b680_0 .var "PC", 31 0;
v000000000091bf40_0 .net "RegRead", 0 0, v000000000091bfe0_0;  1 drivers
v000000000091c620_0 .net "RegWrite", 0 0, v000000000091d020_0;  1 drivers
v000000000091cd00_0 .net "aa", 0 0, v0000000000919350_0;  1 drivers
v000000000091bd60_0 .net "bd", 13 0, v0000000000919e90_0;  1 drivers
v000000000091be00_0 .net "bi", 4 0, v0000000000919670_0;  1 drivers
v000000000091cda0_0 .net "bo", 4 0, v0000000000919f30_0;  1 drivers
v000000000091bae0_0 .net "clock", 0 0, v000000000091b720_0;  1 drivers
v000000000091bc20_0 .net "ds", 13 0, v000000000091b0b0_0;  1 drivers
v000000000091cee0_0 .net "instruction", 31 0, v000000000091a430_0;  1 drivers
v000000000091b540_0 .net "li", 23 0, v000000000091a890_0;  1 drivers
v000000000091b360_0 .net "lk", 0 0, v000000000091a6b0_0;  1 drivers
v000000000091d160_0 .net "memory_read_data", 63 0, v000000000091a570_0;  1 drivers
v000000000091bcc0_0 .net "oe", 0 0, v000000000091acf0_0;  1 drivers
v000000000091ce40_0 .net "opcode", 5 0, L_000000000091b860;  1 drivers
v000000000091b4a0_0 .net "rc", 0 0, v0000000000919490_0;  1 drivers
v000000000091d0c0_0 .net "rd", 4 0, v000000000091a110_0;  1 drivers
v000000000091d200_0 .net "rs", 4 0, v000000000091a4d0_0;  1 drivers
v000000000091c080_0 .net "rs_content", 63 0, v0000000000919850_0;  1 drivers
v000000000091c120_0 .net "rt", 4 0, v000000000091a1b0_0;  1 drivers
v000000000091b900_0 .net "rt_content", 63 0, v000000000091aed0_0;  1 drivers
v000000000091c300_0 .net "si", 15 0, v00000000009193f0_0;  1 drivers
v000000000091c6c0_0 .net "write_data", 63 0, v00000000008ca840_0;  1 drivers
v000000000091c3a0_0 .net "xods", 1 0, v000000000091a930_0;  1 drivers
v000000000091cf80_0 .net "xox", 9 0, v000000000091a9d0_0;  1 drivers
v000000000091b400_0 .net "xoxo", 8 0, v000000000091a250_0;  1 drivers
E_00000000008d5010 .event posedge, v000000000091bae0_0;
S_00000000008a7450 .scope module, "ALU" "ALU32bit" 3 47, 4 5 0, S_00000000008a72c0;
 .timescale 0 0;
    .port_info 0 /OUTPUT 64 "ALU_result";
    .port_info 1 /OUTPUT 1 "Branch";
    .port_info 2 /INPUT 64 "rs";
    .port_info 3 /INPUT 64 "rt";
    .port_info 4 /INPUT 64 "bo";
    .port_info 5 /INPUT 64 "bi";
    .port_info 6 /INPUT 6 "opcode";
    .port_info 7 /INPUT 9 "xoxo";
    .port_info 8 /INPUT 10 "xox";
    .port_info 9 /INPUT 1 "rc";
    .port_info 10 /INPUT 1 "aa";
    .port_info 11 /INPUT 14 "ds";
    .port_info 12 /INPUT 16 "si";
    .port_info 13 /INPUT 2 "xods";
v00000000008ca840_0 .var "ALU_result", 63 0;
v00000000008ca8e0_0 .var "Branch", 0 0;
v00000000008ca340_0 .net "aa", 0 0, v0000000000919350_0;  alias, 1 drivers
v00000000008ca3e0_0 .net "bi", 63 0, v000000000091aed0_0;  alias, 1 drivers
v00000000008caa20_0 .net "bo", 63 0, v0000000000919850_0;  alias, 1 drivers
v00000000008ca160_0 .net "ds", 13 0, v000000000091b0b0_0;  alias, 1 drivers
v00000000008c9e40_0 .net "opcode", 5 0, L_000000000091b860;  alias, 1 drivers
v00000000008c9ee0_0 .net "rc", 0 0, v0000000000919490_0;  alias, 1 drivers
v00000000008ca020_0 .net "rs", 63 0, v0000000000919850_0;  alias, 1 drivers
v00000000008ca200_0 .net "rt", 63 0, v000000000091aed0_0;  alias, 1 drivers
v00000000008ca520_0 .net "si", 15 0, v00000000009193f0_0;  alias, 1 drivers
v00000000008ca2a0_0 .var "sign16ExtendSI", 31 0;
v00000000008ca980_0 .var "signExtendDS", 31 0;
v000000000091abb0_0 .var "signExtendSI", 31 0;
v000000000091ae30_0 .var/s "signed_rs", 31 0;
v000000000091a7f0_0 .var/s "signed_rt", 31 0;
v000000000091aa70_0 .net "xods", 1 0, v000000000091a930_0;  alias, 1 drivers
v0000000000919ad0_0 .net "xox", 9 0, v000000000091a9d0_0;  alias, 1 drivers
v0000000000919b70_0 .net "xoxo", 8 0, v000000000091a250_0;  alias, 1 drivers
E_00000000008d4e10/0 .event edge, v00000000008ca520_0, v00000000008ca160_0, v00000000008c9ee0_0, v000000000091aa70_0;
E_00000000008d4e10/1 .event edge, v0000000000919b70_0, v0000000000919ad0_0, v00000000008ca3e0_0, v00000000008caa20_0;
E_00000000008d4e10 .event/or E_00000000008d4e10/0, E_00000000008d4e10/1;
S_000000000089fd40 .scope module, "InstructionMemory" "read_instructions" 3 41, 5 4 0, S_00000000008a72c0;
 .timescale 0 0;
    .port_info 0 /OUTPUT 32 "instruction";
    .port_info 1 /INPUT 32 "program_counter";
v000000000091a430_0 .var "instruction", 31 0;
v000000000091ac50 .array "instructions", 0 1, 31 0;
v0000000000919c10_0 .net "program_counter", 31 0, v000000000091b680_0;  1 drivers
E_00000000008d4b90 .event edge, v0000000000919c10_0;
S_000000000089fed0 .scope module, "MainMemory" "read_mem" 3 49, 6 4 0, S_00000000008a72c0;
 .timescale 0 0;
    .port_info 0 /OUTPUT 64 "ReadData";
    .port_info 1 /INPUT 64 "address";
    .port_info 2 /INPUT 64 "WriteData";
    .port_info 3 /INPUT 6 "opcode";
    .port_info 4 /INPUT 1 "MemRead";
    .port_info 5 /INPUT 1 "MemWrite";
v000000000091b1f0_0 .net "MemRead", 0 0, v000000000091a610_0;  alias, 1 drivers
v000000000091a750_0 .net "MemWrite", 0 0, v0000000000919df0_0;  alias, 1 drivers
v000000000091a570_0 .var "ReadData", 63 0;
v0000000000919cb0_0 .net "WriteData", 63 0, v0000000000919850_0;  alias, 1 drivers
v00000000009197b0_0 .net "address", 63 0, v00000000008ca840_0;  alias, 1 drivers
v00000000009198f0 .array "data_mem", 0 4, 63 0;
v0000000000919d50_0 .net "opcode", 5 0, L_000000000091b860;  alias, 1 drivers
E_00000000008d49d0 .event edge, v00000000008ca840_0;
S_000000000089d470 .scope module, "Parse" "InstructionParse" 3 43, 7 5 0, S_00000000008a72c0;
 .timescale 0 0;
    .port_info 0 /OUTPUT 6 "opcode";
    .port_info 1 /OUTPUT 5 "rs";
    .port_info 2 /OUTPUT 5 "rt";
    .port_info 3 /OUTPUT 5 "rd";
    .port_info 4 /OUTPUT 5 "bo";
    .port_info 5 /OUTPUT 5 "bi";
    .port_info 6 /OUTPUT 9 "xoxo";
    .port_info 7 /OUTPUT 10 "xox";
    .port_info 8 /OUTPUT 1 "rc";
    .port_info 9 /OUTPUT 1 "aa";
    .port_info 10 /OUTPUT 1 "lk";
    .port_info 11 /OUTPUT 1 "oe";
    .port_info 12 /OUTPUT 14 "bd";
    .port_info 13 /OUTPUT 14 "ds";
    .port_info 14 /OUTPUT 16 "si";
    .port_info 15 /OUTPUT 24 "li";
    .port_info 16 /OUTPUT 2 "xods";
    .port_info 17 /INPUT 32 "instruction";
v0000000000919350_0 .var "aa", 0 0;
v0000000000919e90_0 .var "bd", 13 0;
v0000000000919670_0 .var "bi", 4 0;
v0000000000919f30_0 .var "bo", 4 0;
v000000000091b0b0_0 .var "ds", 13 0;
v0000000000919fd0_0 .net "instruction", 31 0, v000000000091a430_0;  alias, 1 drivers
v000000000091a890_0 .var "li", 23 0;
v000000000091a6b0_0 .var "lk", 0 0;
v000000000091acf0_0 .var "oe", 0 0;
v000000000091a070_0 .net "opcode", 5 0, L_000000000091b860;  alias, 1 drivers
v0000000000919490_0 .var "rc", 0 0;
v000000000091a110_0 .var "rd", 4 0;
v000000000091a4d0_0 .var "rs", 4 0;
v000000000091a1b0_0 .var "rt", 4 0;
v00000000009193f0_0 .var "si", 15 0;
v000000000091a930_0 .var "xods", 1 0;
v000000000091a9d0_0 .var "xox", 9 0;
v000000000091a250_0 .var "xoxo", 8 0;
E_00000000008d45d0 .event edge, v000000000091a430_0;
L_000000000091b860 .part v000000000091a430_0, 26, 6;
S_00000000008b4440 .scope module, "Registers" "read_registers" 3 51, 8 1 0, S_00000000008a72c0;
 .timescale 0 0;
    .port_info 0 /OUTPUT 64 "ReadData1";
    .port_info 1 /OUTPUT 64 "ReadData2";
    .port_info 2 /INPUT 5 "rs";
    .port_info 3 /INPUT 5 "rt";
    .port_info 4 /INPUT 5 "rd";
    .port_info 5 /INPUT 6 "opcode";
    .port_info 6 /INPUT 64 "WriteData";
    .port_info 7 /INPUT 1 "RegRead";
    .port_info 8 /INPUT 1 "RegWrite";
v0000000000919850_0 .var "ReadData1", 63 0;
v000000000091aed0_0 .var "ReadData2", 63 0;
v000000000091ad90_0 .net "RegRead", 0 0, v000000000091bfe0_0;  alias, 1 drivers
v000000000091a2f0_0 .net "RegWrite", 0 0, v000000000091d020_0;  alias, 1 drivers
v000000000091af70_0 .net "WriteData", 63 0, v00000000008ca840_0;  alias, 1 drivers
v000000000091b010_0 .net "opcode", 5 0, L_000000000091b860;  alias, 1 drivers
v0000000000919530_0 .net "rd", 4 0, v000000000091a110_0;  alias, 1 drivers
v000000000091a390 .array "registers", 0 31, 63 0;
v0000000000919710_0 .net "rs", 4 0, v000000000091a4d0_0;  alias, 1 drivers
v000000000091b150_0 .net "rt", 4 0, v000000000091a1b0_0;  alias, 1 drivers
E_00000000008d5090 .event edge, v000000000091a110_0, v000000000091a1b0_0, v000000000091a4d0_0;
S_00000000008b45d0 .scope module, "Signals" "control_unit" 3 45, 9 3 0, S_00000000008a72c0;
 .timescale 0 0;
    .port_info 0 /OUTPUT 1 "RegRead";
    .port_info 1 /OUTPUT 1 "RegWrite";
    .port_info 2 /OUTPUT 1 "MemRead";
    .port_info 3 /OUTPUT 1 "MemWrite";
    .port_info 4 /OUTPUT 1 "Branch";
    .port_info 5 /INPUT 6 "opcode";
    .port_info 6 /INPUT 9 "xoxo";
    .port_info 7 /INPUT 10 "xox";
    .port_info 8 /INPUT 2 "xods";
v0000000000919a30_0 .var "Branch", 0 0;
v000000000091a610_0 .var "MemRead", 0 0;
v0000000000919df0_0 .var "MemWrite", 0 0;
v000000000091bfe0_0 .var "RegRead", 0 0;
v000000000091d020_0 .var "RegWrite", 0 0;
v000000000091ba40_0 .net "opcode", 5 0, L_000000000091b860;  alias, 1 drivers
v000000000091c1c0_0 .net "xods", 1 0, v000000000091a930_0;  alias, 1 drivers
v000000000091b5e0_0 .net "xox", 9 0, v000000000091a9d0_0;  alias, 1 drivers
v000000000091bea0_0 .net "xoxo", 8 0, v000000000091a250_0;  alias, 1 drivers
E_00000000008d4fd0 .event edge, v000000000091aa70_0, v0000000000919ad0_0, v0000000000919b70_0, v00000000008c9e40_0;
    .scope S_000000000089fd40;
T_0 ;
    %vpi_call 5 11 "$readmemb", "instructions.mem", v000000000091ac50, 32'sb00000000000000000000000000000001, 32'sb00000000000000000000000000000000 {0 0 0};
    %end;
    .thread T_0;
    .scope S_000000000089fd40;
T_1 ;
    %wait E_00000000008d4b90;
    %ix/getv 4, v0000000000919c10_0;
    %load/vec4a v000000000091ac50, 4;
    %store/vec4 v000000000091a430_0, 0, 32;
    %jmp T_1;
    .thread T_1, $push;
    .scope S_000000000089d470;
T_2 ;
    %wait E_00000000008d45d0;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 31, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 9, 1, 2;
    %pushi/vec4 266, 0, 9;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 9, 1, 2;
    %pushi/vec4 40, 0, 9;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %and;
    %flag_set/vec4 8;
    %jmp/0xz  T_2.0, 8;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 21, 6;
    %store/vec4 v000000000091a110_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 16, 6;
    %store/vec4 v000000000091a4d0_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 11, 5;
    %store/vec4 v000000000091a1b0_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 9, 1, 2;
    %store/vec4 v000000000091a250_0, 0, 9;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 1, 10, 5;
    %store/vec4 v000000000091acf0_0, 0, 1;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 1, 0, 2;
    %store/vec4 v0000000000919490_0, 0, 1;
    %jmp T_2.1;
T_2.0 ;
    %load/vec4 v000000000091a070_0;
    %cmpi/e 31, 0, 6;
    %jmp/0xz  T_2.2, 4;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 10, 1, 2;
    %store/vec4 v000000000091a9d0_0, 0, 10;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 1, 0, 2;
    %store/vec4 v0000000000919490_0, 0, 1;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 21, 6;
    %store/vec4 v000000000091a110_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 16, 6;
    %store/vec4 v000000000091a4d0_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 11, 5;
    %store/vec4 v000000000091a1b0_0, 0, 5;
    %jmp T_2.3;
T_2.2 ;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 14, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 15, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 28, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 24, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 26, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 32, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 36, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 37, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 40, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 42, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 44, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 34, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091a070_0;
    %pushi/vec4 38, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %flag_set/vec4 8;
    %jmp/0xz  T_2.4, 8;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 21, 6;
    %store/vec4 v000000000091a110_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 16, 6;
    %store/vec4 v000000000091a4d0_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 16, 0, 2;
    %store/vec4 v00000000009193f0_0, 0, 16;
    %jmp T_2.5;
T_2.4 ;
    %load/vec4 v000000000091a070_0;
    %cmpi/e 19, 0, 6;
    %jmp/0xz  T_2.6, 4;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 21, 6;
    %store/vec4 v0000000000919f30_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 16, 6;
    %store/vec4 v0000000000919670_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 1, 1, 2;
    %store/vec4 v0000000000919350_0, 0, 1;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 1, 0, 2;
    %store/vec4 v000000000091a6b0_0, 0, 1;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 14, 2, 3;
    %store/vec4 v0000000000919e90_0, 0, 14;
    %jmp T_2.7;
T_2.6 ;
    %load/vec4 v000000000091a070_0;
    %cmpi/e 18, 0, 6;
    %jmp/0xz  T_2.8, 4;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 24, 2, 3;
    %store/vec4 v000000000091a890_0, 0, 24;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 1, 1, 2;
    %store/vec4 v0000000000919350_0, 0, 1;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 1, 0, 2;
    %store/vec4 v000000000091a6b0_0, 0, 1;
    %jmp T_2.9;
T_2.8 ;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 21, 6;
    %store/vec4 v000000000091a110_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 5, 16, 6;
    %store/vec4 v000000000091a4d0_0, 0, 5;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 14, 2, 3;
    %store/vec4 v000000000091b0b0_0, 0, 14;
    %load/vec4 v0000000000919fd0_0;
    %parti/s 2, 0, 2;
    %store/vec4 v000000000091a930_0, 0, 2;
T_2.9 ;
T_2.7 ;
T_2.5 ;
T_2.3 ;
T_2.1 ;
    %jmp T_2;
    .thread T_2, $push;
    .scope S_00000000008b45d0;
T_3 ;
    %wait E_00000000008d4fd0;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000000000091a610_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0000000000919df0_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000000000091d020_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000000000091bfe0_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0000000000919a30_0, 0, 1;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 31, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v000000000091bea0_0;
    %pad/u 32;
    %pushi/vec4 0, 0, 32;
    %cmp/ne;
    %flag_get/vec4 4;
    %and;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.0, 8;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091bfe0_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091d020_0, 0, 1;
    %jmp T_3.1;
T_3.0 ;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 31, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v000000000091b5e0_0;
    %pad/u 32;
    %pushi/vec4 0, 0, 32;
    %cmp/ne;
    %flag_get/vec4 4;
    %and;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.2, 8;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091bfe0_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091d020_0, 0, 1;
    %jmp T_3.3;
T_3.2 ;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 14, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 15, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 28, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 24, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 26, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.4, 8;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091bfe0_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091d020_0, 0, 1;
    %jmp T_3.5;
T_3.4 ;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 32, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 40, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 42, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 34, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 58, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.6, 8;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091bfe0_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091d020_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091a610_0, 0, 1;
    %jmp T_3.7;
T_3.6 ;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 36, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 37, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 44, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 38, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v000000000091ba40_0;
    %pushi/vec4 62, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.8, 8;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091bfe0_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0000000000919df0_0, 0, 1;
    %jmp T_3.9;
T_3.8 ;
    %load/vec4 v000000000091ba40_0;
    %cmpi/e 18, 0, 6;
    %jmp/0xz  T_3.10, 4;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0000000000919a30_0, 0, 1;
    %jmp T_3.11;
T_3.10 ;
    %load/vec4 v000000000091ba40_0;
    %cmpi/e 19, 0, 6;
    %jmp/0xz  T_3.12, 4;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000000000091bfe0_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0000000000919a30_0, 0, 1;
T_3.12 ;
T_3.11 ;
T_3.9 ;
T_3.7 ;
T_3.5 ;
T_3.3 ;
T_3.1 ;
    %jmp T_3;
    .thread T_3, $push;
    .scope S_00000000008a7450;
T_4 ;
    %wait E_00000000008d4e10;
    %load/vec4 v00000000008ca020_0;
    %pad/u 32;
    %store/vec4 v000000000091ae30_0, 0, 32;
    %load/vec4 v00000000008ca200_0;
    %pad/u 32;
    %store/vec4 v000000000091a7f0_0, 0, 32;
    %load/vec4 v00000000008ca520_0;
    %parti/s 1, 15, 5;
    %replicate 48;
    %load/vec4 v00000000008ca520_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 32;
    %store/vec4 v000000000091abb0_0, 0, 32;
    %load/vec4 v00000000008ca520_0;
    %load/vec4 v00000000008ca520_0;
    %parti/s 1, 15, 5;
    %replicate 16;
    %concat/vec4; draw_concat_vec4
    %store/vec4 v00000000008ca2a0_0, 0, 32;
    %load/vec4 v00000000008ca160_0;
    %parti/s 1, 13, 5;
    %replicate 50;
    %load/vec4 v00000000008ca160_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 32;
    %store/vec4 v00000000008ca980_0, 0, 32;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 31, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v0000000000919b70_0;
    %pad/u 32;
    %pushi/vec4 0, 0, 32;
    %cmp/ne;
    %flag_get/vec4 4;
    %and;
    %flag_set/vec4 8;
    %jmp/0xz  T_4.0, 8;
    %load/vec4 v0000000000919b70_0;
    %dup/vec4;
    %pushi/vec4 266, 0, 9;
    %cmp/u;
    %jmp/1 T_4.2, 6;
    %dup/vec4;
    %pushi/vec4 40, 0, 9;
    %cmp/u;
    %jmp/1 T_4.3, 6;
    %jmp T_4.4;
T_4.2 ;
    %load/vec4 v000000000091ae30_0;
    %pad/s 64;
    %load/vec4 v000000000091a7f0_0;
    %pad/s 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.4;
T_4.3 ;
    %load/vec4 v000000000091a7f0_0;
    %pad/s 64;
    %load/vec4 v000000000091ae30_0;
    %pad/s 64;
    %sub;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.4;
T_4.4 ;
    %pop/vec4 1;
    %jmp T_4.1;
T_4.0 ;
    %load/vec4 v00000000008c9e40_0;
    %cmpi/e 31, 0, 6;
    %jmp/0xz  T_4.5, 4;
    %load/vec4 v0000000000919ad0_0;
    %dup/vec4;
    %pushi/vec4 28, 0, 10;
    %cmp/u;
    %jmp/1 T_4.7, 6;
    %dup/vec4;
    %pushi/vec4 986, 0, 10;
    %cmp/u;
    %jmp/1 T_4.8, 6;
    %dup/vec4;
    %pushi/vec4 476, 0, 10;
    %cmp/u;
    %jmp/1 T_4.9, 6;
    %dup/vec4;
    %pushi/vec4 444, 0, 10;
    %cmp/u;
    %jmp/1 T_4.10, 6;
    %dup/vec4;
    %pushi/vec4 316, 0, 10;
    %cmp/u;
    %jmp/1 T_4.11, 6;
    %jmp T_4.12;
T_4.7 ;
    %load/vec4 v00000000008ca020_0;
    %load/vec4 v00000000008ca200_0;
    %and;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.12;
T_4.8 ;
    %load/vec4 v00000000008ca020_0;
    %parti/s 1, 31, 6;
    %replicate 32;
    %load/vec4 v00000000008ca020_0;
    %parti/s 32, 0, 2;
    %concat/vec4; draw_concat_vec4
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.12;
T_4.9 ;
    %load/vec4 v00000000008ca020_0;
    %load/vec4 v00000000008ca200_0;
    %and;
    %inv;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.12;
T_4.10 ;
    %load/vec4 v00000000008ca020_0;
    %load/vec4 v00000000008ca200_0;
    %or;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.12;
T_4.11 ;
    %load/vec4 v00000000008ca020_0;
    %load/vec4 v00000000008ca200_0;
    %xor;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.12;
T_4.12 ;
    %pop/vec4 1;
    %jmp T_4.6;
T_4.5 ;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 14, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 15, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 28, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 24, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 26, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 32, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 36, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 37, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 40, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 42, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 44, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 34, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %load/vec4 v00000000008c9e40_0;
    %pushi/vec4 38, 0, 6;
    %cmp/e;
    %flag_get/vec4 4;
    %or;
    %flag_set/vec4 8;
    %jmp/0xz  T_4.13, 8;
    %load/vec4 v00000000008c9e40_0;
    %dup/vec4;
    %pushi/vec4 14, 0, 6;
    %cmp/u;
    %jmp/1 T_4.15, 6;
    %dup/vec4;
    %pushi/vec4 15, 0, 6;
    %cmp/u;
    %jmp/1 T_4.16, 6;
    %dup/vec4;
    %pushi/vec4 28, 0, 6;
    %cmp/u;
    %jmp/1 T_4.17, 6;
    %dup/vec4;
    %pushi/vec4 24, 0, 6;
    %cmp/u;
    %jmp/1 T_4.18, 6;
    %dup/vec4;
    %pushi/vec4 26, 0, 6;
    %cmp/u;
    %jmp/1 T_4.19, 6;
    %dup/vec4;
    %pushi/vec4 32, 0, 6;
    %cmp/u;
    %jmp/1 T_4.20, 6;
    %dup/vec4;
    %pushi/vec4 36, 0, 6;
    %cmp/u;
    %jmp/1 T_4.21, 6;
    %dup/vec4;
    %pushi/vec4 37, 0, 6;
    %cmp/u;
    %jmp/1 T_4.22, 6;
    %dup/vec4;
    %pushi/vec4 40, 0, 6;
    %cmp/u;
    %jmp/1 T_4.23, 6;
    %dup/vec4;
    %pushi/vec4 42, 0, 6;
    %cmp/u;
    %jmp/1 T_4.24, 6;
    %dup/vec4;
    %pushi/vec4 44, 0, 6;
    %cmp/u;
    %jmp/1 T_4.25, 6;
    %dup/vec4;
    %pushi/vec4 36, 0, 6;
    %cmp/u;
    %jmp/1 T_4.26, 6;
    %dup/vec4;
    %pushi/vec4 36, 0, 6;
    %cmp/u;
    %jmp/1 T_4.27, 6;
    %jmp T_4.28;
T_4.15 ;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %load/vec4 v00000000008ca020_0;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.16 ;
    %load/vec4 v00000000008ca2a0_0;
    %pad/u 64;
    %load/vec4 v00000000008ca020_0;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.17 ;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %load/vec4 v00000000008ca020_0;
    %and;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.18 ;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %load/vec4 v00000000008ca020_0;
    %or;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.19 ;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %load/vec4 v00000000008ca020_0;
    %xor;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.20 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.21 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.22 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.23 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.24 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.25 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.26 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.27 ;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v000000000091abb0_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.28;
T_4.28 ;
    %pop/vec4 1;
    %jmp T_4.14;
T_4.13 ;
    %load/vec4 v00000000008c9e40_0;
    %cmpi/e 18, 0, 6;
    %jmp/0xz  T_4.29, 4;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v00000000008ca8e0_0, 0, 1;
    %jmp T_4.30;
T_4.29 ;
    %load/vec4 v00000000008c9e40_0;
    %cmpi/e 19, 0, 6;
    %jmp/0xz  T_4.31, 4;
    %load/vec4 v00000000008ca340_0;
    %cmpi/e 0, 0, 1;
    %jmp/0xz  T_4.33, 4;
    %load/vec4 v000000000091ae30_0;
    %pad/s 64;
    %load/vec4 v000000000091a7f0_0;
    %pad/s 64;
    %sub;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %load/vec4 v00000000008ca840_0;
    %cmpi/e 0, 0, 64;
    %jmp/0xz  T_4.35, 4;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v00000000008ca8e0_0, 0, 1;
    %jmp T_4.36;
T_4.35 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v00000000008ca8e0_0, 0, 1;
T_4.36 ;
    %jmp T_4.34;
T_4.33 ;
    %load/vec4 v000000000091ae30_0;
    %pad/s 64;
    %load/vec4 v000000000091a7f0_0;
    %pad/s 64;
    %sub;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %load/vec4 v00000000008ca840_0;
    %cmpi/e 0, 0, 64;
    %jmp/0xz  T_4.37, 4;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v00000000008ca8e0_0, 0, 1;
    %pushi/vec4 0, 0, 64;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.38;
T_4.37 ;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v00000000008ca8e0_0, 0, 1;
T_4.38 ;
T_4.34 ;
    %jmp T_4.32;
T_4.31 ;
    %load/vec4 v00000000008c9e40_0;
    %cmpi/e 58, 0, 6;
    %jmp/0xz  T_4.39, 4;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v00000000008ca980_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
    %jmp T_4.40;
T_4.39 ;
    %load/vec4 v00000000008c9e40_0;
    %cmpi/e 62, 0, 6;
    %jmp/0xz  T_4.41, 4;
    %load/vec4 v000000000091ae30_0;
    %pad/u 64;
    %load/vec4 v00000000008ca980_0;
    %pad/u 64;
    %add;
    %store/vec4 v00000000008ca840_0, 0, 64;
T_4.41 ;
T_4.40 ;
T_4.32 ;
T_4.30 ;
T_4.14 ;
T_4.6 ;
T_4.1 ;
    %jmp T_4;
    .thread T_4, $push;
    .scope S_00000000008a7450;
T_5 ;
    %vpi_call 4 131 "$monitor", "Opcode : %6b, RS : %b, RT : %b, signExtendImm = %b, signExtendDs = %b Result : %b\012", v00000000008c9e40_0, v00000000008ca020_0, v00000000008ca200_0, v000000000091abb0_0, v00000000008ca980_0, v00000000008ca840_0 {0 0 0};
    %end;
    .thread T_5;
    .scope S_000000000089fed0;
T_6 ;
    %vpi_call 6 15 "$readmemb", "data.mem", v00000000009198f0, 32'sb00000000000000000000000000000100, 32'sb00000000000000000000000000000000 {0 0 0};
    %end;
    .thread T_6;
    .scope S_000000000089fed0;
T_7 ;
    %wait E_00000000008d49d0;
    %load/vec4 v000000000091a750_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.0, 8;
    %load/vec4 v0000000000919d50_0;
    %cmpi/e 38, 0, 6;
    %jmp/0xz  T_7.2, 4;
    %pushi/vec4 0, 0, 56;
    %load/vec4 v0000000000919cb0_0;
    %parti/s 8, 0, 2;
    %concat/vec4; draw_concat_vec4
    %ix/getv 4, v00000000009197b0_0;
    %store/vec4a v00000000009198f0, 4, 0;
T_7.2 ;
    %load/vec4 v0000000000919d50_0;
    %cmpi/e 44, 0, 6;
    %jmp/0xz  T_7.4, 4;
    %pushi/vec4 0, 0, 48;
    %load/vec4 v0000000000919cb0_0;
    %parti/s 16, 0, 2;
    %concat/vec4; draw_concat_vec4
    %ix/getv 4, v00000000009197b0_0;
    %store/vec4a v00000000009198f0, 4, 0;
T_7.4 ;
    %load/vec4 v0000000000919d50_0;
    %cmpi/e 36, 0, 6;
    %jmp/0xz  T_7.6, 4;
    %pushi/vec4 0, 0, 32;
    %load/vec4 v0000000000919cb0_0;
    %parti/s 32, 0, 2;
    %concat/vec4; draw_concat_vec4
    %ix/getv 4, v00000000009197b0_0;
    %store/vec4a v00000000009198f0, 4, 0;
T_7.6 ;
    %load/vec4 v0000000000919d50_0;
    %cmpi/e 62, 0, 6;
    %jmp/0xz  T_7.8, 4;
    %load/vec4 v0000000000919cb0_0;
    %ix/getv 4, v00000000009197b0_0;
    %store/vec4a v00000000009198f0, 4, 0;
T_7.8 ;
    %vpi_call 6 37 "$writememb", "data.mem", v00000000009198f0 {0 0 0};
T_7.0 ;
    %jmp T_7;
    .thread T_7, $push;
    .scope S_000000000089fed0;
T_8 ;
    %wait E_00000000008d49d0;
    %load/vec4 v000000000091b1f0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_8.0, 8;
    %ix/getv 4, v00000000009197b0_0;
    %load/vec4a v00000000009198f0, 4;
    %store/vec4 v000000000091a570_0, 0, 64;
T_8.0 ;
    %jmp T_8;
    .thread T_8, $push;
    .scope S_00000000008b4440;
T_9 ;
    %vpi_call 8 12 "$readmemb", "registers.mem", v000000000091a390, 32'sb00000000000000000000000000011111, 32'sb00000000000000000000000000000000 {0 0 0};
    %end;
    .thread T_9;
    .scope S_00000000008b4440;
T_10 ;
    %wait E_00000000008d49d0;
    %load/vec4 v000000000091a2f0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_10.0, 8;
    %load/vec4 v000000000091b010_0;
    %cmpi/e 34, 0, 6;
    %jmp/0xz  T_10.2, 4;
    %pushi/vec4 0, 0, 56;
    %load/vec4 v000000000091af70_0;
    %parti/s 8, 0, 2;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0000000000919530_0;
    %pad/u 7;
    %ix/vec4 4;
    %store/vec4a v000000000091a390, 4, 0;
T_10.2 ;
    %load/vec4 v000000000091b010_0;
    %cmpi/e 40, 0, 6;
    %jmp/0xz  T_10.4, 4;
    %pushi/vec4 0, 0, 48;
    %load/vec4 v000000000091af70_0;
    %parti/s 16, 0, 2;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0000000000919530_0;
    %pad/u 7;
    %ix/vec4 4;
    %store/vec4a v000000000091a390, 4, 0;
T_10.4 ;
    %load/vec4 v000000000091b010_0;
    %cmpi/e 42, 0, 6;
    %jmp/0xz  T_10.6, 4;
    %load/vec4 v000000000091af70_0;
    %parti/s 1, 31, 6;
    %replicate 48;
    %load/vec4 v000000000091af70_0;
    %parti/s 32, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 64;
    %load/vec4 v0000000000919530_0;
    %pad/u 7;
    %ix/vec4 4;
    %store/vec4a v000000000091a390, 4, 0;
T_10.6 ;
    %load/vec4 v000000000091b010_0;
    %cmpi/e 32, 0, 6;
    %jmp/0xz  T_10.8, 4;
    %pushi/vec4 0, 0, 32;
    %load/vec4 v000000000091af70_0;
    %parti/s 32, 0, 2;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0000000000919530_0;
    %pad/u 7;
    %ix/vec4 4;
    %store/vec4a v000000000091a390, 4, 0;
T_10.8 ;
    %load/vec4 v000000000091b010_0;
    %cmpi/e 48, 0, 6;
    %jmp/0xz  T_10.10, 4;
    %load/vec4 v000000000091af70_0;
    %load/vec4 v0000000000919530_0;
    %pad/u 7;
    %ix/vec4 4;
    %store/vec4a v000000000091a390, 4, 0;
T_10.10 ;
    %vpi_call 8 39 "$writememb", "registers.mem", v000000000091a390, 32'sb00000000000000000000000000011111, 32'sb00000000000000000000000000000000 {0 0 0};
T_10.0 ;
    %jmp T_10;
    .thread T_10, $push;
    .scope S_00000000008b4440;
T_11 ;
    %wait E_00000000008d5090;
    %load/vec4 v000000000091ad90_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_11.0, 8;
    %load/vec4 v0000000000919710_0;
    %pad/u 7;
    %ix/vec4 4;
    %load/vec4a v000000000091a390, 4;
    %store/vec4 v0000000000919850_0, 0, 64;
    %load/vec4 v000000000091b150_0;
    %pad/u 7;
    %ix/vec4 4;
    %load/vec4a v000000000091a390, 4;
    %store/vec4 v000000000091aed0_0, 0, 64;
T_11.0 ;
    %jmp T_11;
    .thread T_11, $push;
    .scope S_00000000008a72c0;
T_12 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000000000091b680_0, 0, 32;
    %end;
    .thread T_12;
    .scope S_00000000008a72c0;
T_13 ;
    %wait E_00000000008d5010;
    %load/vec4 v000000000091ce40_0;
    %cmpi/e 18, 0, 6;
    %jmp/0xz  T_13.0, 4;
    %pushi/vec4 0, 0, 8;
    %load/vec4 v000000000091b540_0;
    %concat/vec4; draw_concat_vec4
    %store/vec4 v000000000091b680_0, 0, 32;
    %jmp T_13.1;
T_13.0 ;
    %load/vec4 v000000000091c6c0_0;
    %pushi/vec4 0, 0, 64;
    %cmp/e;
    %flag_get/vec4 4;
    %load/vec4 v000000000091bb80_0;
    %pad/u 32;
    %pushi/vec4 1, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %and;
    %flag_set/vec4 8;
    %jmp/0xz  T_13.2, 8;
    %load/vec4 v000000000091b680_0;
    %addi 1, 0, 32;
    %load/vec4 v000000000091bd60_0;
    %pad/u 32;
    %add;
    %store/vec4 v000000000091b680_0, 0, 32;
    %jmp T_13.3;
T_13.2 ;
    %load/vec4 v000000000091b680_0;
    %addi 1, 0, 32;
    %store/vec4 v000000000091b680_0, 0, 32;
T_13.3 ;
T_13.1 ;
    %jmp T_13;
    .thread T_13;
    .scope S_00000000008cb380;
T_14 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000000000091b720_0, 0, 1;
    %end;
    .thread T_14;
    .scope S_00000000008cb380;
T_15 ;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %delay 100, 0;
    %load/vec4 v000000000091b720_0;
    %inv;
    %store/vec4 v000000000091b720_0, 0, 1;
    %end;
    .thread T_15;
# The file index is used to find the file name in the following table.
:file_names 10;
    "N/A";
    "<interactive>";
    "MIPS_tb.v";
    "./MIPS_core.v";
    "./ALU32bit.v";
    "./ReadInstructions.v";
    "./ReadMem.v";
    "./InstructionParse.v";
    "./ReadRegisters.v";
    "./ControlUnit.v";