GitHub - Dhiraj03/uPowerALU: Verilog code for 32-bit (64-bit registers) IBM uPower ISA.

COA ASSIGNMENT 2 - uPOWER ISA DATAPATH

This is a basic version of the ALU present in a processor that uses uPower ISA (IBM).

Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
ALU32bit.v		ALU32bit.v
ControlUnit.v		ControlUnit.v
InstructionParse.v		InstructionParse.v
MIPS_core.v		MIPS_core.v
MIPS_core.v.out		MIPS_core.v.out
MIPS_tb.v		MIPS_tb.v
MIPS_tb.v.out		MIPS_tb.v.out
README.md		README.md
ReadInstructions.v		ReadInstructions.v
ReadMem.v		ReadMem.v
ReadRegisters.v		ReadRegisters.v
data.mem		data.mem
instructions.mem		instructions.mem
registers.mem		registers.mem

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