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more LSE WAIT_MAX things #534

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more LSE WAIT_MAX things #534

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6b2f215
ChibiOS: use FOME-Tech/ChibiOS:stable_20.3.x.FOME
nmschulte Jan 16, 2025
d44654b
use nmschulte/ChibiOS:nms/lse-wait_max-fome-v20.3.x
nmschulte Jan 16, 2025
7a8130c
FOME-ize LSE MAX_WAIT macros
nmschulte Jan 16, 2025
2032152
s/rusEFI/FOME/ im hw_layer/ports/stm32 BOARD_NAME
nmschulte Jan 17, 2025
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4 changes: 2 additions & 2 deletions .gitmodules
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
[submodule "firmware/ChibiOS"]
path = firmware/ChibiOS
url = https://github.com/rusefi/ChibiOS.git
branch = stable_20.3.x.rusefi
url = https://github.com/nmschulte/ChibiOS.git
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Becomes FOME-Tech/ChibiOS / stable_20.3.x.FOME before (and after ...) this merges.

branch = nms/lse-wait_max-fome-v20.3.x
[submodule "firmware/ChibiOS-Contrib"]
path = firmware/ChibiOS-Contrib
url = https://github.com/rusefi/ChibiOS-Contrib.git
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2 changes: 1 addition & 1 deletion firmware/ChibiOS
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Submodule ChibiOS updated 278 files
2 changes: 1 addition & 1 deletion firmware/docs/rusEFI_custom_chibios.md
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Expand Up @@ -4,7 +4,7 @@ At the moment rusEFI uses https://github.com/rusefi/ChibiOS/tree/stable_20.3.x.r

rusEFI custom version of ChibiOS has the following changes:

*) LSE auto-detection/fallback, RUSEFI_STM32_LSE_WAIT_MAX/RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL
*) LSE auto-detection/fallback, FOME_STM32_LSE_WAIT_MAX/FOME_STM32_LSE_WAIT_MAX_RTCSEL

# TODO items below this line need to be reviewed, seems to NOT be up to date with 20.3 patch

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2 changes: 1 addition & 1 deletion firmware/hw_layer/ports/stm32/stm32f4/board.h
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Expand Up @@ -24,7 +24,7 @@
/*
* Board identifier.
*/
#define BOARD_NAME "F4 for rusEFI"
#define BOARD_NAME "F4 for FOME"

#define EFI_USB_AF 10U
#define EFI_USB_SERIAL_DM Gpio::A11
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8 changes: 4 additions & 4 deletions firmware/hw_layer/ports/stm32/stm32f4/cfg/mcuconf.h
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Expand Up @@ -38,8 +38,8 @@
#define STM32F417_MCUCONF

// Allows LSE init to timeout and configure fallback RTC clock source in case
#define RUSEFI_STM32_LSE_WAIT_MAX 1000000
#define RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL STM32_RTCSEL_LSI
#define FOME_STM32_LSE_WAIT_MAX 1000000
#define FOME_STM32_LSE_WAIT_MAX_RTCSEL STM32_RTCSEL_LSI

/*
* HAL driver system settings.
Expand All @@ -51,7 +51,7 @@
#ifndef STM32_HSE_ENABLED
#define STM32_HSE_ENABLED TRUE
#endif
// see RUSEFI_STM32_LSE_WAIT_MAX
// see FOME_STM32_LSE_WAIT_MAX
#define STM32_LSE_ENABLED TRUE
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
Expand All @@ -63,7 +63,7 @@
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV4
#define STM32_PPRE2 STM32_PPRE2_DIV2
// see RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL
// see FOME_STM32_LSE_WAIT_MAX_RTCSEL
#define STM32_RTCSEL STM32_RTCSEL_LSE
#ifndef STM32_RTCPRE_VALUE
#define STM32_RTCPRE_VALUE 8
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2 changes: 1 addition & 1 deletion firmware/hw_layer/ports/stm32/stm32f7/board.h
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Expand Up @@ -30,7 +30,7 @@
* Board identifier.
*/
#define BOARD_ST_NUCLEO144_F767ZI
#define BOARD_NAME "F7 for rusEFI"
#define BOARD_NAME "F7 for FOME"

#define EFI_USB_AF 10U
#define EFI_USB_SERIAL_DM Gpio::A11
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8 changes: 4 additions & 4 deletions firmware/hw_layer/ports/stm32/stm32f7/cfg/mcuconf.h
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Expand Up @@ -60,8 +60,8 @@
#define STM32F7xx_MCUCONF

// Allows LSE init to timeout and configure fallback RTC clock source in case
#define RUSEFI_STM32_LSE_WAIT_MAX 1000000
#define RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL STM32_RTCSEL_LSI
#define FOME_STM32_LSE_WAIT_MAX 1000000
#define FOME_STM32_LSE_WAIT_MAX_RTCSEL STM32_RTCSEL_LSI

/*
* HAL driver system settings.
Expand All @@ -73,7 +73,7 @@
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
// see RUSEFI_STM32_LSE_WAIT_MAX
// see FOME_STM32_LSE_WAIT_MAX
#define STM32_LSE_ENABLED TRUE
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
Expand All @@ -85,7 +85,7 @@
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV4
#define STM32_PPRE2 STM32_PPRE2_DIV2
// see RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL
// see FOME_STM32_LSE_WAIT_MAX_RTCSEL
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE_VALUE 8
#define STM32_MCO1SEL STM32_MCO1SEL_HSI
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2 changes: 1 addition & 1 deletion firmware/hw_layer/ports/stm32/stm32h7/board.h
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Expand Up @@ -29,7 +29,7 @@
/*
* Board identifier.
*/
#define BOARD_NAME "H7 rusEFI"
#define BOARD_NAME "H7 for FOME"

#define EFI_USB_AF 10U
#define EFI_USB_SERIAL_DM Gpio::A11
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8 changes: 4 additions & 4 deletions firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h
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Expand Up @@ -41,8 +41,8 @@
#define STM32H757_MCUCONF

// Allows LSE init to timeout and configure fallback RTC clock source in case
#define RUSEFI_STM32_LSE_WAIT_MAX 1000000
#define RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL STM32_RTCSEL_LSI_CK
#define FOME_STM32_LSE_WAIT_MAX 1000000
#define FOME_STM32_LSE_WAIT_MAX_RTCSEL STM32_RTCSEL_LSI_CK

/*
* General settings.
Expand Down Expand Up @@ -82,7 +82,7 @@
#define STM32_CSI_ENABLED TRUE
#define STM32_HSI48_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
// see RUSEFI_STM32_LSE_WAIT_MAX
// see FOME_STM32_LSE_WAIT_MAX
#define STM32_LSE_ENABLED TRUE
#define STM32_HSIDIV STM32_HSIDIV_DIV1

Expand Down Expand Up @@ -132,7 +132,7 @@
* Reading STM32 Reference Manual is required.
*/
#define STM32_SW STM32_SW_PLL1_P_CK
// see RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL
// see FOME_STM32_LSE_WAIT_MAX_RTCSEL
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV2
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