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Update Xtensa FreeRTOS support to v11 (#15)
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* Cadence/Xtensa: Initial port from v10.4.4-stable

- Import from https://github.com/foss-xtensa/amazon-freertos
- Various updates to enable build and passing first round of tests

* Cadence/Xtensa: kernel builds, demos passing

Update Xtensa port to version 3.00

* Incorporate Xtensa fixes from ThirdParty/XCC/Xtensa

Warning fixes. (FreeRTOS#356)
b5a9229

Enable use of --text-section-literals in Xtensa port (#485)
b002503

Added better pointer declaration readability (#567)
24ade42

Added support of 64bit events. (#597)
91c20f5

tree-wide: Unify formatting of __cplusplus ifdefs
c1980ce

* Copyright and whitespace updates

Pulled formatting changes from ThirdParty/XCC/Xtensa
No functional changes

* Minor fixes to example build

Fix incorrect readme path
Fix directory separators on windows

Command-line test suite passing

* Fix build error

Remove newlib reent pointer reference

* Fix warnings and whitespace issues

Incorporate recent fixes from legacy Xtensa repo

* Cadence/Xtensa: Fix bug in tickless idle implementation

Critical section nesting counter was not being incremented/decremented during vPortSuppressTicksAndSleeep() so the call to vTaskStepTick() might reenable interrupts and cause a spurious timer expiry.

* Cadence/Xtensa: fix to handle wider range of timer ISRs

- Signed comparison is more flexible for tickless idle / variable frequency support

* Cadence/Xtensa: newlib fixes

- Provide clib/newlib DEINIT function for reentrancy structure to prevent closing of stdin/stdout/stderr on TLS cleanup in task exit.

* Cadence/Xtensa: Update overlay build flags

Increase debugging visibility with -Os; enable thread-safe CLIB support

* Cadence/Xtensa: Fix overlay race condition

- Context switch during overlay use could result in overlay scratch register corruption
- Highly recommend RJ-2024.4 tools or later, which also contains a fix to liboverlay.a

* Cadence/Xtensa: Makefile update to simplify custom config params

- Allow config parameters to be passed through Makefile chain as CFGFLAGS

* Cadence/Xtensa: fix incorrect ifdefs

- Check for windowed ABI, not whether HW supports windowing

* Cadence/Xtensa: Release coprocessor ownership on task deletion

- Resolve issue where it is possible for a task to exit
while owning one or more coprocessors, and the
ownership is not given up properly.

* Cadence/Xtensa: Merge NX + MPU support

- Add privilege syscall handling for XEA3
- Add MPU region restore for windowed/call0 configs
- Separate privileged and user-mode task init for NX
- Optimize privilege syscall handler to skip tail-chain and MPU restore

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Simplify syscall handling for windowed NX

- Save and restore a2 for syscall arg/return
- Add an extra 4 bytes to Exception frame struct
- Avoid rotw since it may not handle underflow condition
- Clean up comments and XT_STK_XTRA_SZ logic
- MPU restore logic cannot be easily skipped at this time

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Restrict overlay build to windowd ABI configs

- Overlay support requires Windowed ABI; won't work with call0
- Update README as well

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Remove unused code

- _xt_idle is legacy code and is unreferenced.

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Limit overlay builds to LX

- Generate error earlier for overlay build attempt on NX

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Fix timer selection logic

- XCHAL_INT_LEVEL() macro requires interrupt number, not timer ID

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Prepare for Upstreaming

- Relocate example test code according to suggested naming conventions
- Modularize build for multiple configs--optionally reroute output
- Update port README

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Minor cleanup

- No functional changes

Signed-off-by: Ian Thompson <[email protected]>

* Cadence/Xtensa: Add portMEMORY_BARRIER() macro

- Cherry picked from FreeRTOS-Kernel commit #190906ae

Signed-off-by: Ian Thompson <[email protected]>

---------

Signed-off-by: Ian Thompson <[email protected]>
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ianstcdns authored Oct 14, 2024
1 parent dc3afc6 commit abc2210
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139 changes: 139 additions & 0 deletions Cadence/Xtensa/Makefile
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### Makefile to build the FreeRTOS library ###

# Build target (options: sim, board)

TARGET = sim
SMALL =

# Tools

CC = xt-clang
AS = xt-clang
AR = xt-ar
ISS = xt-run
XT_CORE = $(patsubst %-params,%,$(notdir $(shell xt-clang --show-config=core)))
CONFIGDIR = $(shell xt-clang --show-config=config)

# For platform-specific commands

include $(CONFIGDIR)/misc/hostenv.mk

# Source code and build locations

# Build with MPU support
ifeq ($(MPU),1)
MPUFLAGS = -DportUSING_MPU_WRAPPERS=1 -DportALIGN_SECTIONS
endif

# Build with overlay support
ifeq ($(OVERLAY),1)
OVLYFLAGS = -DXT_USE_THREAD_SAFE_CLIB=1 -DXT_USE_OVLY=1
endif

SRCROOT = $(subst /,$(S),$(CURDIR))
TSTROOT = $(subst /,$(S),$(abspath $(SRCROOT)$(S)..$(S)..$(S)..$(S)..$(S)..$(S)..$(S)Demo$(S)ThirdParty$(S)Partner-Supported-Demos$(S)Cadence_Xtensa_ISS_xt-clang$(SMALL)))
BLDROOT = $(TSTROOT)$(S)build
BLDAUX ?=
BLDDIR = $(BLDROOT)$(S)$(XT_CORE)$(BLDAUX)

FR_SRCDIR = $(abspath $(SRCROOT)$(S)..$(S)..$(S)..$(S)..$(S)..)
FR_SRCDIR2 = $(FR_SRCDIR)$(S)portable$(S)MemMang
ifeq ($(MPU),1)
FR_SRCDIR3 = $(FR_SRCDIR)$(S)portable$(S)Common
endif
XT_SRCDIR = $(SRCROOT)

vpath %.c $(FR_SRCDIR) $(FR_SRCDIR2) $(FR_SRCDIR3) $(XT_SRCDIR)
vpath %.S $(XT_SRCDIR)

# File lists
# NOTE: Only heap_4.c is included in the default FreeRTOS build.
# If you want to use another heap manager then edit this file
# and specify the one you want.

FR_C_FILES = $(notdir $(wildcard $(FR_SRCDIR)/*.c)) \
$(notdir $(wildcard $(FR_SRCDIR3)/*.c)) \
heap_4.c
XT_C_FILES = $(notdir $(wildcard $(XT_SRCDIR)/*.c))
XT_S_FILES = $(notdir $(wildcard $(XT_SRCDIR)/*.S))

# List of all .o files that will go into the library

LIB_C_O = $(patsubst %.c,%.o,$(filter-out asm-offsets.c,$(XT_C_FILES) $(FR_C_FILES)))
LIB_S_O = $(patsubst %.S,%.o,$(XT_S_FILES))
LIB_O_LIST = $(addprefix $(BLDDIR)/,$(LIB_C_O) $(LIB_S_O))

# Output files

OSLIB = $(BLDDIR)$(S)libfreertos.a

# Build options

ifeq ($(TARGET),sim)
DFLAGS = -DXT_SIMULATOR
endif
ifeq ($(TARGET),board)
DFLAGS = -DXT_BOARD
endif

IFLAGS = \
-I$(FR_SRCDIR)$(S)include -I$(XT_SRCDIR) -I$(TSTROOT)$(S)common$(S)config_files -I$(BLDDIR)

CSTD = -std=c99
ifeq ($(OVERLAY),1)
CFLAGS = -Os -g
else
CFLAGS = -O2 -g
endif
WFLAGS = -Werror -Wall -Wextra
CFGFLAGS ?=
CCFLAGS = $(CSTD) $(CFGFLAGS) $(CFLAGS) $(WFLAGS) -mno-coproc -mlongcalls -ffunction-sections -mno-l32r-flix $(DFLAGS) $(MPUFLAGS) $(OVLYFLAGS)
ASFLAGS = $(CCFLAGS)

# File-specific flags

FLAGS_xtensa_vectors_xea3 = -mtext-section-literals

FLAGS_mpu = -mtext-section-literals
FLAGS_portasm = -mtext-section-literals
FLAGS_xtensa_context = -mtext-section-literals -Wno-error
FLAGS_xtensa_coproc_handler = -mtext-section-literals

# Include dependency rules (generated using -MD)

-include $(wildcard $(BLDDIR)/*.d)

# Targets

all : $(BLDDIR)/.mkdir $(BLDDIR)/reent.h $(OSLIB)

$(BLDDIR)/.mkdir :
@$(MKPATH) $(BLDDIR)
@echo "" > $@

$(BLDDIR)/reent.h : $(BLDDIR)/.mkdir
-$(CP) $(subst /,$(S),$(CONFIGDIR))$(S)xtensa-elf$(S)include$(S)sys$(S)reent.h $(BLDDIR)$(S)reent.h

$(LIB_O_LIST) : $(BLDDIR)/asm-offsets.h

$(OSLIB) : $(LIB_O_LIST)
$(AR) -rs $@ $^

$(BLDDIR)/asm-offsets.h : asm-offsets.c $(BLDDIR)/.mkdir
$(CC) $(CCFLAGS) $(IFLAGS) -MD -MF $(subst .h,.d,$@) -MT $@ -ffunction-sections -fdata-sections -Wl,--gc-sections -o $@.exe $<
$(ISS) $@.exe > $@
$(RM) $(subst /,$(S),$@.exe)

$(BLDDIR)/%.o : %.c $(BLDDIR)/.mkdir
$(CC) $(CCFLAGS) $(IFLAGS) $(FLAGS_$*) -mtext-section-literals -MD -MF $(subst .o,.d,$@) -c -o $@ $<

$(BLDDIR)/%.o : %.S $(BLDDIR)/.mkdir
$(CC) $(ASFLAGS) $(IFLAGS) $(FLAGS_$*) -MD -MF $(subst .o,.d,$@) -c -o $@ $<

clean :
$(RM_R) $(BLDDIR)

clean_all :
$(RM_R) $(BLDROOT)

.PHONY : all clean clean_all
24 changes: 24 additions & 0 deletions Cadence/Xtensa/asm-offsets.c
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#include <stddef.h>
#include <stdio.h>
#include "../../../../../tasks.c"

#define DEFINE(sym,val) \
printf("#define %s %d /* %s */\n", #sym, (val), #val)

int main(void)
{
DEFINE(TCB_TOP_OF_STACK_OFF, offsetof(TCB_t, pxTopOfStack));
#if portUSING_MPU_WRAPPERS
DEFINE(TCB_MPU_SETTINGS_OFF, offsetof(TCB_t, xMPUSettings.mpumap));
DEFINE(MPU_ENTRY_SIZE, sizeof(xthal_MPU_entry));
DEFINE(MPU_ENTRY_AS_OFF, offsetof(xthal_MPU_entry, as));
DEFINE(MPU_ENTRY_AT_OFF, offsetof(xthal_MPU_entry, at));
DEFINE(TCB_TASK_NAME_OFF, offsetof(TCB_t, pcTaskName));
#endif
#if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
DEFINE(TCB_END_OF_STACK_OFF, offsetof(TCB_t, pxEndOfStack));
#endif
#if ( configUSE_C_RUNTIME_TLS_SUPPORT == 1 )
DEFINE(TCB_IMPURE_PTR_OFF, offsetof(TCB_t, xTLSBlock));
#endif
}
155 changes: 155 additions & 0 deletions Cadence/Xtensa/mpu.S
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/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2015-2024 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/

#include "xtensa_rtos.h"
#include "portmacro.h"
#include "asm-offsets.h"

#include <xtensa/hal.h>

/*******************************************************************************
_xt_mpu_restore
!! MUST BE CALLED ONLY BY 'CALL0' INSTRUCTION !!
Restores task's MPU state
Entry Conditions:
A0 = Return address in caller.
*******************************************************************************/
#if portUSING_MPU_WRAPPERS

#if XCHAL_HAVE_XEA3 && (!defined __XTENSA_CALL0_ABI__)
#define A2 a10
#define A3 a11
#define A4 a12
#define A5 a13
#define A6 a14
#else
#define A2 a2
#define A3 a3
#define A4 a4
#define A5 a5
#define A6 a6
#endif

.altmacro

.macro mpu_set_entry entry
/*
* Load both first and last entry for a range to avoid memory access
* when region is partially modified which may result in a TLB multihit.
*/
l32i A3, A2, (TCB_MPU_SETTINGS_OFF + (MPU_ENTRY_SIZE * ((portNUM_MAX_SWAPPED_MPU_PAIRS - \entry) * 2 + 1)) + MPU_ENTRY_AT_OFF)
l32i A4, A2, (TCB_MPU_SETTINGS_OFF + (MPU_ENTRY_SIZE * ((portNUM_MAX_SWAPPED_MPU_PAIRS - \entry) * 2 + 1)) + MPU_ENTRY_AS_OFF)
l32i A5, A2, (TCB_MPU_SETTINGS_OFF + (MPU_ENTRY_SIZE * ((portNUM_MAX_SWAPPED_MPU_PAIRS - \entry) * 2 + 0)) + MPU_ENTRY_AT_OFF)
l32i A6, A2, (TCB_MPU_SETTINGS_OFF + (MPU_ENTRY_SIZE * ((portNUM_MAX_SWAPPED_MPU_PAIRS - \entry) * 2 + 0)) + MPU_ENTRY_AS_OFF)
wptlb A3, A4
wptlb A5, A6
.endm

.section "privileged_functions"
.global _xt_mpu_restore
.type _xt_mpu_restore,@function
.align 4
_xt_mpu_restore:

movi A2, pxCurrentTCB
l32i A2, A2, 0
beqz A2, .Lset

movi A3, g_num_used_mpu_entries
l32i A3, A3, 0
movi A4, .Lset

/*
* A3 = .Lset - 18 * g_num_used_mpu_entries -- is the address of code
* that loads MPU entries of the first g_num_used_mpu_entries regions.
* 18 is the size of piece of code generated by one mpu_set_entry macro
*/
slli A5, A3, 4
addx2 A5, A3, A5
sub A3, A4, A5

jx A3

.begin no-transform

/* Load MPU entries from last to first (not in MPU order,
* in pxCurrentTCB->xMPUSettings order).
*/
.set i, 1
.rept portNUM_MAX_SWAPPED_MPU_PAIRS
mpu_set_entry %i
.set i, i+1
.endr
.Lset:
.end no-transform
isync

ret

#ifdef portALIGN_SECTIONS
.section privileged_functions
.align XCHAL_MPU_ALIGN

.section privileged_data
.align XCHAL_MPU_ALIGN

.section freertos_system_calls
.align XCHAL_MPU_ALIGN

.section .text
.align XCHAL_MPU_ALIGN

.section .data
.align XCHAL_MPU_ALIGN

.section .literal
.align XCHAL_MPU_ALIGN

.section .bss
.align XCHAL_MPU_ALIGN

.section .rodata
.align XCHAL_MPU_ALIGN

.section private_region1
.align XCHAL_MPU_ALIGN
.section private_region2
.align XCHAL_MPU_ALIGN
.section private_region3
.align XCHAL_MPU_ALIGN
.section private_stack
.align XCHAL_MPU_ALIGN
#endif

#endif // portUSING_MPU_WRAPPERS
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