Merge pull request #187 from GreenWaves-Technologies/3.8.0_dev

3.8.1 release

.gitignore

@@ -13,6 +13,3 @@ BUILD
 junit-reports/
 /rtos/pulp/archi/
 /rtos/pulp/hal/
-*.a
-.tiler_url
-

gvsoc/gvsoc_gap/models/pulp/event_unit/eu_v3_impl.cpp

@@ -705,7 +705,11 @@ void Core_event_unit::clear_status(uint32_t mask)
 
 void Core_event_unit::check_pending_req()
 {
-  pending_req->get_resp_port()->resp(pending_req);
+    if (this->pending_req)
+    {
+        this->pending_req->get_resp_port()->resp(pending_req);
+        this->pending_req = NULL;
+    }
 }
 
 void Core_event_unit::cancel_pending_req()
@@ -916,6 +920,7 @@ void Core_event_unit::reset()
   clear_evt_mask = 0;
   sync_irq = -1;
   interrupted_elw = false;
+  this->pending_req = NULL;
   state.set(CORE_STATE_NONE);
   this->clock_itf.sync(1);
 }

gvsoc/gvsoc_gap/models/pulp/event_unit/eu_v4_impl.cpp

@@ -77,12 +77,15 @@ class Semaphore {
 public:
   void reset();
 
-  uint8_t value;
+  uint32_t value;
   uint32_t waiting_mask;
   int elected_core;
+  int width;
   vp::io_req *waiting_reqs[32];
   vp::trace     trace_value;
   vp::trace     trace_waiting_cores;
+
+  void set_value(uint32_t value);
 };
 
 class Semaphore_unit {
@@ -100,6 +103,7 @@ class Semaphore_unit {
   vp::trace     trace;
   int nb_semaphores;
   int semaphore_event;
+  int width;
 };
 
 class Bitfield {
@@ -772,7 +776,11 @@ void Core_event_unit::clear_status(uint32_t mask)
 
 void Core_event_unit::check_pending_req()
 {
-  pending_req->get_resp_port()->resp(pending_req);
+    if (this->pending_req)
+    {
+        this->pending_req->get_resp_port()->resp(pending_req);
+        this->pending_req = NULL;
+    }
 }
 
 void Core_event_unit::cancel_pending_req()
@@ -983,6 +991,7 @@ void Core_event_unit::reset()
   clear_evt_mask = 0;
   sync_irq = -1;
   interrupted_elw = false;
+  this->pending_req = NULL;
   state.set(CORE_STATE_NONE);
   this->clock_itf.sync(1);
 }
@@ -1086,12 +1095,14 @@ Semaphore_unit::Semaphore_unit(Event_unit *top)
 {
     top->traces.new_trace("sem/trace", &trace, vp::DEBUG);
     nb_semaphores = top->get_config_int("**/properties/semaphores/nb_semaphores");
+    this->width = top->get_config_int("**/properties/semaphores/width");
     semaphore_event = top->get_config_int("**/properties/events/semaphore");
     semaphores = new Semaphore[nb_semaphores];
 
     for (int i=0; i<nb_semaphores; i++)
     {
         Semaphore *sem = &this->semaphores[i];
+        sem->width = width;
         this->top->traces.new_trace_event("sem" + std::to_string(i) + "/value", &sem->trace_value, 8);
         this->top->traces.new_trace_event("sem" + std::to_string(i) + "/waiting_cores", &sem->trace_waiting_cores, 32);
     }
@@ -1130,6 +1141,13 @@ void Semaphore::reset()
   this->trace_waiting_cores.event((uint8_t *)&waiting_mask);
 }
 
+
+void Semaphore::set_value(uint32_t value)
+{
+  this->value = value & ((1 << this->width) - 1);
+}
+
+
 vp::io_req_status_e Semaphore_unit::req(vp::io_req *req, uint64_t offset, bool is_write, uint32_t *data, int core)
 {
   unsigned int id = EU_SEM_AREA_SEMID_GET(offset);
@@ -1150,7 +1168,7 @@ vp::io_req_status_e Semaphore_unit::req(vp::io_req *req, uint64_t offset, bool i
     else
     {
       this->trace.msg("Setting semaphore value (semaphore: %d, value: 0x%x)\n", id, *data);
-      semaphore->value = *data;
+      semaphore->set_value(*data);
     }
   }
   else if (offset == EU_HW_SEM_COUNTER)
@@ -1159,7 +1177,7 @@ vp::io_req_status_e Semaphore_unit::req(vp::io_req *req, uint64_t offset, bool i
     {
       if (semaphore->value > 0)
       {
-        semaphore->value--;
+        semaphore->set_value(semaphore->value - 1);
         semaphore->trace_value.event((uint8_t *)&semaphore->value);
         this->trace.msg("Decrementing semaphore (semaphore: %d, coreId: %d, new_value: %d)\n", id, core);
       }
@@ -1171,7 +1189,7 @@ vp::io_req_status_e Semaphore_unit::req(vp::io_req *req, uint64_t offset, bool i
     }
     else
     {
-      semaphore->value += *(uint32_t *)req->get_data();
+      semaphore->set_value(semaphore->value +  *(uint32_t *)req->get_data());
       semaphore->trace_value.event((uint8_t *)&semaphore->value);
       this->trace.msg("Incrementing semaphore (semaphore: %d, core: %d, inc: %d, value: %d)\n", id, core, *(uint32_t *)req->get_data(), semaphore->value);
 
@@ -1202,7 +1220,7 @@ vp::io_req_status_e Semaphore_unit::req(vp::io_req *req, uint64_t offset, bool i
           // And trigger the event to the core
           top->trigger_event(1<<semaphore_event, 1<<semaphore->elected_core); 
 
-          semaphore->value--;
+          semaphore->set_value(semaphore->value - 1);
           semaphore->trace_value.event((uint8_t *)&semaphore->value);
         }
 
@@ -1214,6 +1232,16 @@ vp::io_req_status_e Semaphore_unit::req(vp::io_req *req, uint64_t offset, bool i
       }
     }
   }
+  else if (offset == EU_HW_SEM_LOAD_INC)
+  {
+    if (!is_write)
+    {
+      *data = semaphore->value;
+      semaphore->set_value(semaphore->value + 1);
+      this->trace.msg("Incrementing semaphore (semaphore: %d, core: %d, value: %d)\n", id, core, semaphore->value);
+      semaphore->trace_value.event((uint8_t *)&semaphore->value);
+    }
+  }
 
   return vp::IO_REQ_OK;
 }
@@ -1249,8 +1277,8 @@ void Bitfield::reset()
 
 vp::io_req_status_e Bitfield_unit::req(vp::io_req *req, uint64_t offset, bool is_write, uint32_t *data, int core)
 {
-  unsigned int id = EU_SEM_AREA_SEMID_GET(offset);
-  offset = offset - (id << EU_SEM_SIZE_LOG2);
+  unsigned int id = EU_BITFIELD_AREA_BITFIELDID_GET(offset);
+  offset = offset - (id << EU_BITFIELD_SIZE_LOG2);
 
   if (id >= nb_bitfields) return vp::IO_REQ_INVALID;
 

rtos/freeRTOS/freertos_kernel/portable/GCC/RI5CY-GAP8/chip_specific_extensions/gap8/freertos_risc_v_chip_specific_extensions.h

@@ -26,13 +26,15 @@
  */
 
 #if !defined(ASSEMBLY_LANGUAGE)
+
 /* Control and Status Registers reset values. */
 /* Machine mode with IRQ disabled, after MRET stay in MM. */
 #define portINITIAL_MSTATUS ( 0x1880 )
 /* Retrieve MTVEC address from linker script. */
 extern uint8_t __irq_vector_base_m__;
 #define portINITIAL_MEPC    ( &__irq_vector_base_m__ )
 #define portINITIAL_MCAUSE  ( 0x00000000 )
+
 #endif  /* ASSEMBLY_LANGUAGE */
 
 /* Size of a word, in bytes. */
@@ -65,3 +67,9 @@ extern uint8_t __irq_vector_base_m__;
 #define LP_START_1  ( 0x7B4 )
 #define LP_END_1    ( 0x7B5 )
 #define LP_COUNT_1  ( 0x7B6 )
+
+/* Registers position on stack. */
+#define portGAP8_REG_RA_POS      ( 0 )
+#define portGAP8_REG_A0_POS      ( 1 )
+#define portGAP8_REG_MSTATUS_POS ( 28 )
+#define portGAP8_REG_MEPC_POS    ( 29 )

rtos/freeRTOS/freertos_kernel/portable/GCC/RI5CY-GAP8/port.c

@@ -78,27 +78,21 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack,
 {
     /* Few bytes on the bottom of the stack. May be useful for debugging. */
     pxTopOfStack--;
-    *pxTopOfStack = 0xdeedfeed;
-
-    /* GAP8 extensions. */
-    {
-        /* Hardware Loop registers. */
-        pxTopOfStack -= (uint32_t) portGAP8_ADDITIONAL_EXTENSIONS;
-    }
-    /* Control and status registers saved if R/W. */
-    {
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) pxCode; /* MEPC */
-        pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portINITIAL_MSTATUS; /* MSTATUS */
-    }
-    /* General purpose registers saved. sp reg stored in Task Control Block. */
+    *pxTopOfStack = ( uint32_t ) 0xFEED51AC;
+    pxTopOfStack -= ( uint32_t ) portGAP8_FULL_CONTEXT_SIZE;
+    for (uint32_t reg = 0; reg < ( uint32_t ) portGAP8_FULL_CONTEXT_SIZE; reg++)
     {
-	pxTopOfStack -= 27; /* a1-a7 + t0-t6 +  s0-11 */
-	*pxTopOfStack = ( StackType_t ) pvParameters; /* a0 */
-	pxTopOfStack -= 1;
-        *pxTopOfStack = ( StackType_t ) pxCode; /* ra */
+        /* GAP8 extensions : Hardware Loop registers.
+         * Control and status registers saved if R/W.
+         * General purpose registers saved : ra + a0-a7 + t0-t6 +  s0-11.
+         * sp reg stored in Task Control Block.
+         */
+        pxTopOfStack[reg] = 0x0;
     }
+    pxTopOfStack[portGAP8_REG_RA_POS] = ( StackType_t ) pxCode;                   /* RA */
+    pxTopOfStack[portGAP8_REG_A0_POS] = ( StackType_t ) pvParameters;             /* A0 */
+    pxTopOfStack[portGAP8_REG_MSTATUS_POS] = ( StackType_t ) portINITIAL_MSTATUS; /* MSTATUS */
+    pxTopOfStack[portGAP8_REG_MEPC_POS] = ( StackType_t ) pxCode;                 /* MEPC */
 
 /*
  * Task's stack view.

rtos/pulp/archi_pulp/include/archi/eu/eu_v4.h

@@ -46,7 +46,7 @@
 #define EU_DISPATCH_AREA_SIZE_LOG2          4
 #define EU_DISPATCH_AREA_SIZE               (1<<EU_DISPATCH_AREA_SIZE_LOG2)
 #define EU_SEM_AREA_SIZE                    0x100
-#define EU_BITFIELD_AREA_SIZE               0x100
+#define EU_BITFIELD_AREA_SIZE               0x200
 
 // Demux offsets
 #define EU_CORE_DEMUX_OFFSET                0x0000
@@ -63,8 +63,8 @@
 #define EU_BARRIER_DEMUX_SIZE               0x0200
 #define EU_SEM_DEMUX_OFFSET                 0x0400
 #define EU_SEM_DEMUX_SIZE                   0x0100
-#define EU_BITFIELD_DEMUX_OFFSET            0x0500
-#define EU_BITFIELD_DEMUX_SIZE              0x0100
+#define EU_BITFIELD_DEMUX_OFFSET            0x0600
+#define EU_BITFIELD_DEMUX_SIZE              0x0200
 
 // Only when secure extensions are active
 #define EU_SEC_DEMUX_OFFSET                  0x040
@@ -128,7 +128,7 @@
  // Single semaphore
 #define EU_HW_SEM_VALUE                     0x00
 #define EU_HW_SEM_COUNTER                   0x04
-#define EU_HW_SEM_BITFIELD                  0x08
+#define EU_HW_SEM_LOAD_INC                  0x08
 
  // Single bitfield unit
 #define EU_HW_BITFIELD_VALUE                0x00

rtos/pulp/gap_archi/include/archi/eu/eu_v4.h

@@ -46,7 +46,7 @@
 #define EU_DISPATCH_AREA_SIZE_LOG2          4
 #define EU_DISPATCH_AREA_SIZE               (1<<EU_DISPATCH_AREA_SIZE_LOG2)
 #define EU_SEM_AREA_SIZE                    0x100
-#define EU_BITFIELD_AREA_SIZE               0x100
+#define EU_BITFIELD_AREA_SIZE               0x200
 
 // Demux offsets
 #define EU_CORE_DEMUX_OFFSET                0x0000
@@ -63,8 +63,8 @@
 #define EU_BARRIER_DEMUX_SIZE               0x0200
 #define EU_SEM_DEMUX_OFFSET                 0x0400
 #define EU_SEM_DEMUX_SIZE                   0x0100
-#define EU_BITFIELD_DEMUX_OFFSET            0x0500
-#define EU_BITFIELD_DEMUX_SIZE              0x0100
+#define EU_BITFIELD_DEMUX_OFFSET            0x0600
+#define EU_BITFIELD_DEMUX_SIZE              0x0200
 
 // Only when secure extensions are active
 #define EU_SEC_DEMUX_OFFSET                  0x040
@@ -128,7 +128,7 @@
  // Single semaphore
 #define EU_HW_SEM_VALUE                     0x00
 #define EU_HW_SEM_COUNTER                   0x04
-#define EU_HW_SEM_BITFIELD                  0x08
+#define EU_HW_SEM_LOAD_INC                  0x08
 
  // Single bitfield unit
 #define EU_HW_BITFIELD_VALUE                0x00

rtos/pulp/gap_archi/include/hal/eu/eu_v4.h

@@ -490,6 +490,15 @@ static inline uint32_t eu_sem_get(unsigned int sem_addr)
     return IP_READ(sem_addr, EU_HW_SEM_VALUE);
 }
 
+static inline void eu_sem_set(unsigned int sem_addr, uint32_t value)
+{
+    IP_WRITE(sem_addr, EU_HW_SEM_VALUE, value);
+}
+
+static inline uint32_t eu_sem_load_inc(unsigned int sem_addr)
+{
+    return IP_READ(sem_addr, EU_HW_SEM_LOAD_INC);
+}
 
 
 
@@ -510,7 +519,7 @@ static inline void eu_bitfield_value_set(unsigned int bitfield_addr, uint32_t va
 
 static inline uint32_t eu_bitfield_value_get(unsigned int bitfield_addr)
 {
-    return evt_read32(bitfield_addr, EU_HW_BITFIELD_VALUE);
+    return IP_READ(bitfield_addr, EU_HW_BITFIELD_VALUE);
 }
 
 static inline void eu_bitfield_set(unsigned int bitfield_addr, uint32_t value)
@@ -525,7 +534,7 @@ static inline void eu_bitfield_clear(unsigned int bitfield_addr, uint32_t value)
 
 static inline uint32_t eu_bitfield_alloc(unsigned int bitfield_addr)
 {
-    return evt_read32(bitfield_addr, EU_HW_BITFIELD_ALLOC);
+    return IP_READ(bitfield_addr, EU_HW_BITFIELD_ALLOC);
 }
 
 static inline void eu_bitfield_value_set_from_id(int id, uint32_t value)

tools/gap-configs/configs/ips/event_unit/eu_v4.json

@@ -13,16 +13,17 @@
         "size": 8
       },
       "mutex": {
-        "nb_mutexes": 1
+        "nb_mutexes": 8
       },
       "barriers": {
         "nb_barriers": 8
       },
       "semaphores": {
-        "nb_semaphores": 16
+        "nb_semaphores": 16,
+        "width": 12
       },
       "bitfields": {
-        "nb_bitfields": 8
+        "nb_bitfields": 24
       },
       "soc_event": {
         "nb_fifo_events": 8,

tools/nntool/generation/generators/kernels/mult8/conv_pool_relu_kernels_generator.py

@@ -23,7 +23,7 @@
 from generation.generators.generator_decorators import generation_function, QREC_MULT8
 from graph.dim import PadDim
 from graph.types import (ActivationParameters, Conv2DParameters,
-                         ConvFusionParameters, PoolingParameters)
+                         ConvFusionParameters)
 from utils.node_id import NodeId
 
 from ..autotiler_kernel import AutotilerKernel
@@ -77,6 +77,7 @@ def conv_pool_relu_kernels_generator(gen, node, qrec, in_eparams, out_eparams, c
         return False
     return True
 
+
 def gen_cnn_conv_pool_act_qs8(code_block, cname,
                               in_feat, out_feat, width, height, bias_size,
                               conv_oper, fcx, fcy, dcx, dcy, scx, scy, conv_pad,

tools/nntool/importer/common/provisional_dim.py

@@ -44,6 +44,10 @@ def flatten(self):
             self.shape,
             [])
 
+    def eliminate_dimension(self, dim_idx):
+        self.shape[dim_idx] = None
+        return self
+
     def infer_mapping(self, shape, allow_bad_length=False):
         assert allow_bad_length or len(shape) == len(self.known_shape), "shape cannot be inferred"
         new_shape = []