ALU

src/cpu.rs

@@ -1,5 +1,5 @@
 use crate::mode::GBMode;
-use crate::registers::Registers;
+use crate::registers::{Registers, Flags};
 
 pub struct CPU {
     reg: Registers
@@ -38,7 +38,17 @@ impl CPU {
             0x45 => self.reg.b = self.reg.l,
             0x46 => {},
             0x47 => self.reg.b = self.reg.a,
-            _ => {},
+            code => panic!("Instruction {:2X} is unknown!", code),
         }
     }
+
+    fn alu_add(&mut self, x: u8) {
+        let a = self.reg.a;
+        let x = a.wrapping_add(x);
+        self.reg.set_flag(Flags::C, u16::from(a) + u16::from(x) > 0xFF);
+        self.reg.set_flag(Flags::H, (a & 0x0F) + (a & 0x0F) > 0x0F);
+        self.reg.set_flag(Flags::N, false);
+        self.reg.set_flag(Flags::Z, x == 0x00);
+        self.reg.a = x;
+    }
 }

src/registers.rs

@@ -1,4 +1,4 @@
-use bitflags::{bitflags};
+use bitflags::bitflags;
 use crate::mode::GBMode;
 
 pub struct Registers {
@@ -28,6 +28,18 @@ bitflags! {
 }
 
 impl Registers {
+    pub fn get_flag(&self, flag: Flags) -> bool {
+        self.f.contains(flag)
+    }
+
+    pub fn set_flag(&mut self, flag: Flags, state: bool) {
+        if state {
+            self.f |= flag;
+        } else {
+            self.f &= !flag;
+        }
+    }
+
     pub fn new(mode: GBMode) -> Registers {
         match mode {
             GBMode::Classic => {