Wave RAM

src/sound/apu.rs

@@ -63,6 +63,7 @@ impl Memory for APU {
             0xFF10..=0xFF14 => self.sc1.read(a),
             0xFF15..=0xFF19 => self.sc2.read(a),
             0xFF1A..=0xFF1E => self.sc3.read(a),
+            0xFF30..=0xFF3F => self.sc3.read(a),
             0xFF20..=0xFF24 => self.sc4.read(a),
             _ => 0xFF
         }
@@ -98,6 +99,7 @@ impl Memory for APU {
                     self.sc3.write(a, v)
                 }
             },
+            0xFF30..=0xFF3F => self.sc3.write(a, v),
             0xFF20..=0xFF24 => {
                 if self.audio_enabled {
                     self.sc4.write(a, v)

src/sound/sc3.rs

@@ -7,7 +7,8 @@ pub struct SC3 {
     output_level: OutputLevel,
     period: u16,
     pub trigger: bool,
-    length_enabled: bool
+    length_enabled: bool,
+    wave_ram: [u8; 16]
 }
 
 bitflags! {
@@ -29,6 +30,7 @@ impl SC3 {
             period: 0,
             trigger: false,
             length_enabled: false,
+            wave_ram: [0; 16]
         }
     }
 
@@ -55,6 +57,7 @@ impl Memory for SC3 {
             0xFF1D => 0xFF,
             // NR34: Period High & Control
             0xFF1E => (self.length_enabled as u8) << 6 | 0xBF,
+            0xFF30..=0xFF3F => self.wave_ram[a as usize - 0xFF30],
             _ => 0xFF,
         }
     }
@@ -79,6 +82,7 @@ impl Memory for SC3 {
                 self.period &= 0b0000_0000_1111_1111;
                 self.period |= ((v & 0b0000_0111) as u16) << 8;
             },
+            0xFF30..=0xFF3F => self.wave_ram[a as usize - 0xFF30] = v,
             _ => panic!("Write to unsupported SC3 address ({:#06x})!", a),
         }
     }