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Jzjerry/readme.md

Hi, I'm JIANG (Jerry) Zijun

Click here to learn more about me!

✨Fancy Stuffs✨

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Code Time

Profile Views

I'm an Early 🐤

🌞 Morning                67 commits          █░░░░░░░░░░░░░░░░░░░░░░░░   04.86 % 
🌆 Daytime                723 commits         █████████████░░░░░░░░░░░░   52.39 % 
🌃 Evening                511 commits         █████████░░░░░░░░░░░░░░░░   37.03 % 
🌙 Night                  79 commits          █░░░░░░░░░░░░░░░░░░░░░░░░   05.72 % 

📅 I'm Most Productive on Monday

Monday                   277 commits         █████░░░░░░░░░░░░░░░░░░░░   20.07 % 
Tuesday                  262 commits         █████░░░░░░░░░░░░░░░░░░░░   18.99 % 
Wednesday                210 commits         ████░░░░░░░░░░░░░░░░░░░░░   15.22 % 
Thursday                 224 commits         ████░░░░░░░░░░░░░░░░░░░░░   16.23 % 
Friday                   213 commits         ████░░░░░░░░░░░░░░░░░░░░░   15.43 % 
Saturday                 96 commits          ██░░░░░░░░░░░░░░░░░░░░░░░   06.96 % 
Sunday                   98 commits          ██░░░░░░░░░░░░░░░░░░░░░░░   07.10 % 

📊 This Week I Spent My Time On

🕑︎ Time Zone: Asia/Shanghai

💬 Programming Languages: 
Python                   12 hrs 43 mins      █████████████████████░░░░   84.41 % 
Scala                    54 mins             ██░░░░░░░░░░░░░░░░░░░░░░░   06.07 % 
Tcl                      34 mins             █░░░░░░░░░░░░░░░░░░░░░░░░   03.76 % 
JSON                     25 mins             █░░░░░░░░░░░░░░░░░░░░░░░░   02.77 % 
V                        23 mins             █░░░░░░░░░░░░░░░░░░░░░░░░   02.61 % 

🔥 Editors: 
VS Code                  15 hrs 4 mins       █████████████████████████   100.00 % 

💻 Operating System: 
Linux                    14 hrs 34 mins      ████████████████████████░   96.69 % 
WSL                      29 mins             █░░░░░░░░░░░░░░░░░░░░░░░░   03.31 % 

I Mostly Code in Python

Python                   12 repos            ██████░░░░░░░░░░░░░░░░░░░   25.53 % 
C                        9 repos             █████░░░░░░░░░░░░░░░░░░░░   19.15 % 
Scala                    8 repos             ████░░░░░░░░░░░░░░░░░░░░░   17.02 % 
C++                      7 repos             ████░░░░░░░░░░░░░░░░░░░░░   14.89 % 
Verilog                  7 repos             ████░░░░░░░░░░░░░░░░░░░░░   14.89 % 

Last Updated on 07/01/2025 18:42:39 UTC

Pinned Loading

  1. HKUSTGZ-MICS-LYU/SPaDE-VexRiscv HKUSTGZ-MICS-LYU/SPaDE-VexRiscv Public

    SPaDE for VexRiscv

    Python 7

  2. Jzjerry.github.io Jzjerry.github.io Public

    HTML 2

  3. VexRiscv VexRiscv Public

    Forked from SpinalHDL/VexRiscv

    A FPGA friendly 32 bit RISC-V CPU implementation

    Assembly 1

  4. VexiiRiscv VexiiRiscv Public

    Forked from SpinalHDL/VexiiRiscv

    Scala

  5. NodeMCU_LCD NodeMCU_LCD Public

    A simple monitor for Bilibili livers based on ESP8266 & TFT_eSPI

    C++ 2