Pursuing Masters
I am currently pursuing my masters in VLSI. I will be posting my VLSI projects in the github
-
Amrita Vishwa Vidyapeedam
- Coimbatore
Popular repositories Loading
-
Mixed-signal-block-for-signal-processing
Mixed-signal-block-for-signal-processing PublicIn the project esim tool has been used for the design. The tool includes ngspice to design analog part and verilator to design the digital part.
-
Control-Unit-Design-for-Single-Instruction-Multiple-Data-SIMD-processor-architecture
Control-Unit-Design-for-Single-Instruction-Multiple-Data-SIMD-processor-architecture PublicVerilog
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.