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Temp disable last layer (since hwc tiling) Verify #182: Commit cdf8f37 pushed by abarajithan11
October 26, 2023 16:47 18m 48s master
master
October 26, 2023 16:47 18m 48s
Temp disable last layer (since hwc tiling) Verify #181: Commit 28f686b pushed by abarajithan11
October 26, 2023 16:47 15m 28s master
master
October 26, 2023 16:47 15m 28s
Temp disable last layer (since hwc tiling) Verify #180: Commit b8c9f7f pushed by abarajithan11
October 26, 2023 16:40 13m 54s master
master
October 26, 2023 16:40 13m 54s
Python - tiling all layers Verify #179: Commit 6d14263 pushed by abarajithan11
October 26, 2023 04:28 15m 45s master
master
October 26, 2023 04:28 15m 45s
Fix tiling (py) cm/cmp0 Verify #178: Commit 383f235 pushed by abarajithan11
October 26, 2023 01:59 13m 4s master
master
October 26, 2023 01:59 13m 4s
Fix runtime - switch order of N and L Verify #177: Commit da04103 pushed by abarajithan11
October 24, 2023 18:37 10m 55s master
master
October 24, 2023 18:37 10m 55s
Fix runtime - switch order of N and L Verify #176: Commit c609dd7 pushed by abarajithan11
October 24, 2023 18:23 12m 47s master
master
October 24, 2023 18:23 12m 47s
Fix H-padding Verify #175: Commit 760448d pushed by abarajithan11
October 24, 2023 04:14 12m 41s master
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October 24, 2023 04:14 12m 41s
Fix bits=8 Verify #174: Commit 2f79ab8 pushed by abarajithan11
October 19, 2023 05:53 15m 1s master
master
October 19, 2023 05:53 15m 1s
Add & test tiling in python Verify #173: Commit 0b4fe23 pushed by abarajithan11
October 18, 2023 21:12 3m 3s master
master
October 18, 2023 21:12 3m 3s
Add support for quantized_bits(keep_neg=False) and quantized_relu(slo… Verify #172: Commit 3bca141 pushed by abarajithan11
September 17, 2023 00:34 2m 35s master
master
September 17, 2023 00:34 2m 35s
Quantize & LRELU in Runtime Verify #171: Commit 3adc71f pushed by abarajithan11
September 16, 2023 23:56 2m 33s master
master
September 16, 2023 23:56 2m 33s
Merge the logic of quantize and q_leaky_relu into one Verify #169: Commit 6e96871 pushed by abarajithan11
September 16, 2023 22:37 3m 1s master
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September 16, 2023 22:37 3m 1s
Further optimize activation Verify #166: Commit 3103116 pushed by abarajithan11
September 16, 2023 20:25 2m 43s master
master
September 16, 2023 20:25 2m 43s
Fix Dense: 1. CONFIG_BEATS=1 causes odd CM, modified w_rot FSM to all… Verify #165: Commit 5f039e9 pushed by abarajithan11
September 16, 2023 08:19 2m 52s master
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September 16, 2023 08:19 2m 52s
Refactor runtime Verify #164: Commit 47822e2 pushed by abarajithan11
September 16, 2023 06:55 2m 33s master
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September 16, 2023 06:55 2m 33s
Refactor runtime Verify #163: Commit 0f45fbd pushed by abarajithan11
September 16, 2023 00:21 3m 39s master
master
September 16, 2023 00:21 3m 39s
Add bias; works for all conv2d, not dense Verify #162: Commit 8b7d62b pushed by abarajithan11
September 15, 2023 06:55 2m 54s master
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September 15, 2023 06:55 2m 54s
Mark output ports with m_ for ASIC pin placement Verify #161: Commit e4b7930 pushed by abarajithan11
September 13, 2023 05:46 2m 0s master
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September 13, 2023 05:46 2m 0s
Move all memory from SV to C. Works in Verilator Verify #160: Commit 89dd249 pushed by abarajithan11
September 12, 2023 07:40 2m 39s master
master
September 12, 2023 07:40 2m 39s
Update README Verify #158: Commit 9e3dcec pushed by abarajithan11
September 6, 2023 08:14 2m 26s master
master
September 6, 2023 08:14 2m 26s