Network-on-Chip (NoC) with Link Aggregation (LAG) synthesized in Quartus. Repo contains script LAG.tcl that creates and configures Quartus II project of the NoC with LAG. Gate level model of the NoC with LAG can be created and than simulated in ModelSim.
-
Notifications
You must be signed in to change notification settings - Fork 0
Network-on-Chip (NoC) with Link Aggregation (LAG), modified for synthesis in Quartus II. Repo contains LAG.tcl that creates and configures Quartus II project of the NoC with LAG. In addition, gate level model of the NoC with LAG can be created and than simulated in ModelSim.
License
GPL-2.0, Unknown licenses found
Licenses found
GPL-2.0
LICENSE
Unknown
License.txt
KorotkiyEugene/LAG_sv_syn_quartus
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
About
Network-on-Chip (NoC) with Link Aggregation (LAG), modified for synthesis in Quartus II. Repo contains LAG.tcl that creates and configures Quartus II project of the NoC with LAG. In addition, gate level model of the NoC with LAG can be created and than simulated in ModelSim.
Resources
License
GPL-2.0, Unknown licenses found
Licenses found
GPL-2.0
LICENSE
Unknown
License.txt
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published