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Modifications for scalability. Introduced pow clusters (cores). Each …
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…cluster contains several POW calculation inits
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Korotkiy committed Jul 14, 2018
1 parent d45e5a2 commit 51c7222
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Showing 4 changed files with 69 additions and 35 deletions.
2 changes: 1 addition & 1 deletion pow_accel_soc/hardware/LFSR27trit.v
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Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,7 @@ integer i = 0;
always @(posedge i_clk, negedge i_arst_n) begin

if (~i_arst_n) begin
lfsr <= (1'b1 << 2*UNIT_NUMBER);
lfsr <= (1'b1 << UNIT_NUMBER);
end else begin
lfsr <= {lfsr[52:0], lfsr_lsb};
end
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84 changes: 58 additions & 26 deletions pow_accel_soc/hardware/curl_avalon.v
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,8 @@ module curl_avalon ( i_clk,
i_master_readdata
);

parameter CU_NUM = 10;
parameter CL_NUM = 6; //Number of clusters
parameter CU_NUM = 4; //Number of calc units in cluster

localparam MASTER_DATA_WIDTH = 128;
localparam MASTER_BE_WIDTH = MASTER_DATA_WIDTH/8;
Expand Down Expand Up @@ -114,10 +115,12 @@ reg curl_transform_ff;
reg curl_pow_ff;
reg [31:0] curl_pow_mwm_mask;
reg [53:0] curl_idata_ff;
wire [161:0] curl_nonce;
reg [80:0][1:0] curl_nonce_trits;
wire curl_otransforming;
wire curl_pow_finish;
wire [CL_NUM-1:0][161:0] nonces;
reg [161:0] nonce;
reg [80:0][1:0] nonce_trits;
wire [CL_NUM-1:0] curl_otransforming;
wire [CL_NUM-1:0] curl_pow_finish;
reg pow_finish_ff;

reg [MASTER_DATA_WIDTH-1:0] awm_user_buffer_data;
wire [MASTER_ADDR_WIDTH-1:0] awm_master_address;
Expand Down Expand Up @@ -150,26 +153,36 @@ reg [63:0] tick_cnt;

reg rst_cnt_ff;
reg tick_cnt_en_ff;
wire hash_cnt_en;
wire [CL_NUM-1:0] hash_cnt_en;

integer i;

genvar n;

assign o_finish_int = finish_ff;

curl_pow #(.CU_NUM(CU_NUM))
curl_pow_inst (.i_clk ( i_clk ),
.i_arst_n ( curl_rst_n),
.i_we ( curl_we_ff ),
.i_addr ( curl_addr_ff ),
.i_data ( curl_idata_ff ),
.i_transform ( curl_transform_ff ),
.i_pow( curl_pow_ff ),
.i_mwm_mask( curl_pow_mwm_mask ),
.o_transforming ( curl_otransforming ),
.o_pow_finish ( curl_pow_finish ),
.o_pow_hash_finish( hash_cnt_en ),
.o_data ( curl_nonce )
);
generate

for (n = 0; n < CL_NUM; n++) begin: pow_clusters

curl_pow #(.CU_NUM(CU_NUM), .CL_NUM(n))
curl_pow_inst (.i_clk ( i_clk ),
.i_arst_n ( curl_rst_n),
.i_we ( curl_we_ff ),
.i_addr ( curl_addr_ff ),
.i_data ( curl_idata_ff ),
.i_transform ( curl_transform_ff ),
.i_pow( curl_pow_ff ),
.i_mwm_mask( curl_pow_mwm_mask ),

.o_transforming ( curl_otransforming[n] ),
.o_pow_finish ( curl_pow_finish[n] ),
.o_pow_hash_finish( hash_cnt_en[n] ),
.o_data ( nonces[n] )
);
end

endgenerate

write_master #( .DATAWIDTH ( MASTER_DATA_WIDTH ),
.BYTEENABLEWIDTH ( MASTER_BE_WIDTH ),
Expand Down Expand Up @@ -437,17 +450,18 @@ always @(posedge i_clk, posedge i_arst) begin

TRANSFORM_S: begin

if (!curl_transform_ff && !curl_otransforming) begin
if (!curl_transform_ff && !curl_otransforming[0]) begin
state_ff <= LOAD_S;
end

end

POW_S: begin

if (curl_pow_finish) begin
if (pow_finish_ff) begin

state_ff <= STORE_S;
curl_rst_n <= 1'b0;
awm_control_go <= 1'b1;
curl_trit_cnt_ff <= '0;
mem_trit_cnt_ff <= '0;
Expand All @@ -462,7 +476,7 @@ always @(posedge i_clk, posedge i_arst) begin

if (!awm_user_buffer_full) begin

awm_user_buffer_data[8*mem_trit_cnt_ff +: 8] <= $signed(curl_nonce_trits[curl_trit_cnt_ff]);
awm_user_buffer_data[8*mem_trit_cnt_ff +: 8] <= $signed(nonce_trits[curl_trit_cnt_ff]);

curl_trit_cnt_ff <= curl_trit_cnt_ff + 1'b1;
mem_trit_cnt_ff <= mem_trit_cnt_ff + 1'b1;
Expand Down Expand Up @@ -538,13 +552,31 @@ always @(posedge i_clk) begin

if (rst_cnt_ff)
hash_cnt <= '0;
else if (hash_cnt_en)
hash_cnt <= hash_cnt + CU_NUM;
else if (hash_cnt_en[0])
hash_cnt <= hash_cnt + CU_NUM*CL_NUM;

end

always @(posedge i_clk, posedge i_arst) begin

if (i_arst) begin
pow_finish_ff <= 1'b0;
end else begin
pow_finish_ff <= |curl_pow_finish;
end

end

always @(posedge i_clk) begin

for (i=0; i<CL_NUM; i=i+1)
if (curl_pow_finish[i])
nonce <= nonces[i];

end

always @* begin
curl_nonce_trits = curl_nonce;
nonce_trits = nonce;
end

endmodule
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13 changes: 7 additions & 6 deletions pow_accel_soc/hardware/curl_pow.v
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Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,8 @@ module curl_pow (i_clk,
o_data
);

parameter CU_NUM = 10;
parameter CU_NUM = 4;
parameter CL_NUM = 1;

localparam DATA_WIDTH = 54;
localparam STATE_WORDS = 27;
Expand Down Expand Up @@ -218,10 +219,10 @@ generate

for (n = 0; n < CU_NUM; n++) begin: nonce_generator

LFSR27trit #(.UNIT_NUMBER(n)) LFSR27trit_inst(.i_clk (i_clk),
.i_arst_n (i_arst_n),
.o_rnd_trits (rnd_trits[n])
);
LFSR27trit #(.UNIT_NUMBER(CU_NUM*CL_NUM + n)) LFSR27trit_inst(.i_clk (i_clk),
.i_arst_n (i_arst_n),
.o_rnd_trits (rnd_trits[n])
);

//nonce ff part
always @(posedge i_clk, negedge i_arst_n)
Expand Down Expand Up @@ -297,7 +298,6 @@ always @(posedge i_clk, negedge i_arst_n) begin
o_pow_hash_finish <= 1'b0;
end else begin

o_pow_finish <= 1'b0;
o_pow_hash_finish <= 1'b0;

case (state_ff)
Expand All @@ -309,6 +309,7 @@ always @(posedge i_clk, negedge i_arst_n) begin
o_transforming <= 1'b1;
round_cnt_ff <= '0;
transform_m_we_ff <= 1'b1;
o_pow_finish <= 1'b0;
end

if ( i_pow ) begin
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5 changes: 3 additions & 2 deletions pow_accel_soc/hardware/soc_top.v
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Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,8 @@ module soc_top(
output HPS_USB_STP
);

parameter CALC_UNIT_NUMBER = 11;
parameter CU_NUM = 4;
parameter CL_NUM = 7;

wire hps_fpga_rst;
wire hps_fpga_clk;
Expand Down Expand Up @@ -203,7 +204,7 @@ soc_system u0( .reset_bridge_0_out_reset_reset ( hps_fpga_rst ),
.hps_0_f2h_irq0_irq ( irq_bus ) // hps_0_f2h_irq0.irq
);

curl_avalon #(.CU_NUM(CALC_UNIT_NUMBER))
curl_avalon #(.CU_NUM(CU_NUM), .CL_NUM(CL_NUM))
curl_avalon_inst( .i_clk ( hps_fpga_clk ),
.i_arst ( hps_fpga_rst ),
.o_finish_int ( irq_bus[0] ),
Expand Down

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