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Merge pull request #20 from Luos-io/tx_it
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Tx it
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@Salem-Tho
Salem-Tho authored Apr 9, 2021
2 parents fcea396 + 5851b53 commit cd93f92
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Showing 23 changed files with 1,668 additions and 1,185 deletions.
397 changes: 220 additions & 177 deletions ATSAMD21/luos_hal.c
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6 changes: 3 additions & 3 deletions ATSAMD21/luos_hal.h
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Expand Up @@ -32,10 +32,10 @@ uint32_t LuosHAL_GetSystick(void);
void LuosHAL_ComInit(uint32_t Baudrate);
void LuosHAL_SetTxState(uint8_t Enable);
void LuosHAL_SetRxState(uint8_t Enable);
uint8_t LuosHAL_ComTransmit(uint8_t *data, uint16_t size);
void LuosHAL_SetTxLockDetecState(uint8_t Enable);
void LuosHAL_ComTransmit(uint8_t *data, uint16_t size);
uint8_t LuosHAL_GetTxLockState(void);
void LuosHAL_ComTxComplete(void);
void LuosHAL_SetRxDetecPin(uint8_t Enable);
void LuosHAL_ResetTimeout(uint16_t nbrbit);
void LuosHAL_SetPTPDefaultState(uint8_t PTPNbr);
void LuosHAL_SetPTPReverseState(uint8_t PTPNbr);
void LuosHAL_PushPTP(uint8_t PTPNbr);
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25 changes: 23 additions & 2 deletions ATSAMD21/luos_hal_config.h
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Expand Up @@ -12,6 +12,8 @@

#include "samd21.h"

//If your MCU do not Have DMA for tx transmit define USE_TX_IT

#define DISABLE 0x00

#ifndef MCUFREQ
Expand Down Expand Up @@ -132,11 +134,30 @@
#ifndef LUOS_COM_IRQHANDLER
#define LUOS_COM_IRQHANDLER() SERCOM0_Handler()
#endif
/*******************************************************************************
* DMA CONFIG
******************************************************************************/
#ifndef LUOS_DMA_CLOCK_ENABLE
#define LUOS_DMA_CLOCK_ENABLE() \
do \
{ \
PM_REGS->PM_AHBMASK |= PM_AHBMASK_DMAC_Msk; \
} while (0U)
#endif
#ifndef LUOS_DMA
#define LUOS_DMA DMAC_REGS
#endif
#ifndef LUOS_DMA_TRIGGER
#define LUOS_DMA_TRIGGER 2
#endif
#ifndef LUOS_DMA_CHANNEL
#define LUOS_DMA_CHANNEL 0
#endif
/*******************************************************************************
* COM TIMEOUT CONFIG
******************************************************************************/
#ifndef LUOS_TIMER_LOCK_ENABLE
#define LUOS_TIMER_LOCK_ENABLE() \
#ifndef LUOS_TIMER_CLOCK_ENABLE
#define LUOS_TIMER_CLOCK_ENABLE() \
do \
{ \
GCLK_REGS->GCLK_CLKCTRL = GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_TCC2_TC3_Val) | GCLK_CLKCTRL_GEN(0x0) | GCLK_CLKCTRL_CLKEN_Msk; \
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48 changes: 25 additions & 23 deletions ATSAMD21_ARDUINO/board_config.h
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Expand Up @@ -12,31 +12,33 @@

#include <Arduino.h>

#ifdef ARDUINO_SAMD_ZERO
#define LUOS_COM_CLOCK_ENABLE() \
do \
{ \
GCLK->CLKCTRL.reg = \
(uint16_t)(GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val) | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN); \
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0; \
} while (0U)
#define LUOS_COM SERCOM0
#define LUOS_COM_IRQ SERCOM0_IRQn
#define LUOS_COM_IRQHANDLER() SERCOM0_Handler()
#if defined(ARDUINO_SAMD_ZERO)
#define LUOS_COM_CLOCK_ENABLE() \
do \
{ \
GCLK->CLKCTRL.reg = \
(uint16_t)(GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val) | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN); \
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0; \
} while (0U)
#define LUOS_COM SERCOM0
#define LUOS_COM_IRQ SERCOM0_IRQn
#define LUOS_COM_IRQHANDLER() SERCOM0_Handler()
#endif

#if defined(ARDUINO_SAMD_MKR1000) || defined(ARDUINO_SAMD_MKRWIFI1010) || defined(ARDUINO_SAMD_MKRFox1200) || defined(ARDUINO_SAMD_MKRWAN1300) \
|| defined(ARDUINO_SAMD_MKRWAN1310)|| defined(ARDUINO_SAMD_MKRGSM1400) || defined(ARDUINO_SAMD_MKRNB1500)
.
do \
{ \
GCLK->CLKCTRL.reg = \
(uint16_t)(GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM5_CORE_Val) | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN); \
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM5 \
} while (0U)
#define LUOS_COM SERCOM5
#define LUOS_COM_IRQ SERCOM5_IRQn
#define LUOS_COM_IRQHANDLER() SERCOM5_Handler()
#if (defined(ARDUINO_SAMD_MKR1000) || defined(ARDUINO_SAMD_MKRWIFI1010) || defined(ARDUINO_SAMD_MKRFox1200) \
|| defined(ARDUINO_SAMD_MKRWAN1300) || defined(ARDUINO_SAMD_MKRWAN1310)|| defined(ARDUINO_SAMD_MKRGSM1400) \
|| defined(ARDUINO_SAMD_MKRNB1500) || defined(ARDUINO_SAMD_MKRZERO) || defined(ARDUINO_SAMD_NANO_33_IOT) \
|| defined(SAMD_MKRVIDOR4000))
#define LUOS_COM_CLOCK_ENABLE()\
do \
{ \
GCLK->CLKCTRL.reg = \
(uint16_t)(GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM5_CORE_Val) | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN); \
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM5; \
} while (0U)
#define LUOS_COM SERCOM5
#define LUOS_COM_IRQ SERCOM5_IRQn
#define LUOS_COM_IRQHANDLER() SERCOM5_Handler()
#endif

#endif /* _BOARD_CONFIG_H_ */
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