add read/write from BS offsets instructions

MESYETI · Nov 14, 2023 · 7cd64fc · 7cd64fc
1 parent 2880260
commit 7cd64fc
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Showing 3 changed files with 61 additions and 1 deletion.
diff --git a/docs/architecture.md b/docs/architecture.md
@@ -85,4 +85,10 @@ registers, words (16-bit) for data, and 24-bit values for addresses
 - `POP (reg)` (0x2B) - Pops a value from the stack and stores it in the given register
 - `JZ (addr)` (0x2C) - Jumps to the given address if A is 0
 - `JZB (addr)` (0x2D)- Jumps to the given address + `BC` if A is 0
+- `RDBB (reg pair)` (0x2E) - Reads a byte from `BS` + reg pair and stores it in `A`
+- `RDWB (reg pair)` (0x2F) - Reads a 16-bit value from `BS` + reg pair and stores it in `A`
+- `RDAB (reg pair)` (0x30) - Reads a 24-bit value from `BS` + reg pair and stores it in `A`
+- `WRBB (reg pair) (reg)` (0x31) - Writes the low 8-bits of `reg` to `BS` + reg pair
+- `WRWB (reg pair) (reg)` (0x32) - Writes `reg` to `BS` + reg pair
+- `WRAB (reg pair) (reg pair)` (0x33) - Writes the second reg pair to `BS` + second reg pair
 - `HLT` (0xFF) - Stops execution
diff --git a/source/assembler/assembler.d b/source/assembler/assembler.d
@@ -81,6 +81,12 @@ class Assembler {
 		AddInstruction("diff", Opcode.DIFF, [Param.RegisterPair, Param.RegisterPair]);
 		AddInstruction("jz",   Opcode.JZ,   [Param.Addr]);
 		AddInstruction("jzb",  Opcode.JZB,  [Param.Addr]);
+		AddInstruction("rdbb", Opcode.RDBB, [Param.RegisterPair]);
+		AddInstruction("rdwb", Opcode.RDWB, [Param.RegisterPair]);
+		AddInstruction("rdab", Opcode.RDAB, [Param.RegisterPair]);
+		AddInstruction("wrbb", Opcode.WRBB, [Param.RegisterPair, Param.Register]);
+		AddInstruction("wrwb", Opcode.WRWB, [Param.RegisterPair, Param.Register]);
+		AddInstruction("wrab", Opcode.WRAB, [Param.RegisterPair, Param.RegisterPair]);
 		AddInstruction("hlt",  Opcode.HLT,  []);
 
 		// special
@@ -432,7 +438,16 @@ class Assembler {
 
 									addr = labels[paramNode.name];
 
-									if ((inst.name == "jmpb") || (inst.name == "jnzb")) {
+									string[] bsInstructions = [
+										"jmpb", "jmpzb", "jzb", "rdbb", "rdwb", "rdab",
+										"wrbb", "wrwb", "wrab"
+									];
+
+									/*if ((inst.name == "jmpb") || (inst.name == "jnzb")) {
+										addr -= labelBase;
+									}*/
+
+									if (bsInstructions.canFind(inst.name)) {
 										addr -= labelBase;
 									}
 									break;

diff --git a/source/computer.d b/source/computer.d
@@ -64,6 +64,12 @@ enum Opcode {
 	POP  = 0x2B,
 	JZ   = 0x2C,
 	JZB  = 0x2D,
+	RDBB = 0x2E,
+	RDWB = 0x2F,
+	RDAB = 0x30,
+	WRBB = 0x31,
+	WRWB = 0x32,
+	WRAB = 0x33,
 	HLT  = 0xFF
 }
 
@@ -657,6 +663,39 @@ class Computer {
 				}
 				break;
 			}
+			case Opcode.RDBB: {
+				auto addr = ReadRegPair(NextByte());
+				a = ram[bs + addr];
+				break;
+			}
+			case Opcode.RDWB: {
+				auto addr = ReadRegPair(NextByte());
+				a = ReadWord(bs + addr);
+				break;
+			}
+			case Opcode.RDAB: {
+				auto addr = ReadRegPair(NextByte());
+				WriteRegPair(RegPair.AB, ReadAddr(bs + addr));
+				break;
+			}
+			case Opcode.WRBB: {
+				auto addr      = ReadRegPair(NextByte());
+				auto value     = ReadReg(NextByte());
+				ram[bs + addr] = cast(ubyte) value;
+				break;
+			}
+			case Opcode.WRWB: {
+				auto addr  = ReadRegPair(NextByte());
+				auto value = ReadReg(NextByte());
+				WriteWord(addr, value);
+				break;
+			}
+			case Opcode.WRAB: {
+				auto addr = ReadRegPair(NextByte());
+				auto value = ReadRegPair(NextByte());
+				WriteAddr(addr, value);
+				break;
+			}
 			case Opcode.HLT: {
 				halted = true;
 				break;