add CALLB

MESYETI · Nov 19, 2023 · 97e4fe2 · 97e4fe2
1 parent b636787
commit 97e4fe2
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Showing 3 changed files with 12 additions and 1 deletion.
diff --git a/docs/architecture.md b/docs/architecture.md
@@ -104,4 +104,5 @@ registers, words (16-bit) for data, and 24-bit values for addresses
 - `PUSHA (reg pair)` (0x39) - Pushes the given register pair to the stack
 - `POPA (reg pair)` (0x3A) - Pops a register pair from the stack and stores it in the
                              given register pair
+- `CALLB (addr)` (0x3B) - Pushes IP to the stack and jumps to `BS` + addr
 - `HLT` (0xFF) - Stops execution
diff --git a/source/assembler/assembler.d b/source/assembler/assembler.d
@@ -96,7 +96,8 @@ class Assembler {
 		AddInstruction("ltp",   Opcode.LTP,   [Param.RegisterPair, Param.RegisterPair]);
 		AddInstruction("pusha", Opcode.PUSHA, [Param.RegisterPair]);
 		AddInstruction("popa",  Opcode.POPA,  [Param.RegisterPair]);
-		AddInstruction("hlt",   Opcode.HLT,  []);
+		AddInstruction("callb", Opcode.CALLB, [Param.Addr]);
+		AddInstruction("hlt",   Opcode.HLT,   []);
 
 		// special
 		AddInstruction("db", Param.Byte);

diff --git a/source/computer.d b/source/computer.d
@@ -77,6 +77,7 @@ enum Opcode {
 	GTP   = 0x38,
 	PUSHA = 0x39,
 	POPA  = 0x3A,
+	CALLB = 0x3B,
 	HLT   = 0xFF
 }
 
@@ -753,6 +754,14 @@ class Computer {
 				WriteRegPair(NextByte(), ReadAddr(sp));
 				break;
 			}
+			case Opcode.CALLB: {
+				auto addr = NextAddr();
+
+				WriteAddr(sp, ip);
+				sp += 3;
+				ip  = bs + addr;
+				break;
+			}
 			case Opcode.HLT: {
 				halted = true;
 				break;