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Upstream prep for trunk #21

Closed
wants to merge 8 commits into from
Closed

Upstream prep for trunk #21

wants to merge 8 commits into from

Commits on Mar 4, 2024

  1. [RISCV] Add i8500 and p8700 schedulers and target cpu

    @nrakovic @BgZun
    nrakovic authored and BgZun committed Mar 4, 2024
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Commits on Mar 6, 2024

  1. [RISCV] Added 'ccmov' instruction

    @draganmladjenovic @BgZun
    draganmladjenovic authored and BgZun committed Mar 6, 2024
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  2. [RISCV] Add mload-store-pairs support 

    Supports bonding on i8500 w/o using paired instructions
    @draganmladjenovic @BgZun
    draganmladjenovic authored and BgZun committed Mar 6, 2024
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  3. [clang] Add driver support for riscv64-mti toolchains 

    Default to not using integrated as and adjust assembler output
to be compatible with v0.97 gas. Rudimentary big-endian support.
    @draganmladjenovic @BgZun
    draganmladjenovic authored and BgZun committed Mar 6, 2024
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  4. [RISCV] Enable SeparateConstOffsetFromGEPPass for RISC-V

    @BgZun
    Djordje Todorovic authored and BgZun committed Mar 6, 2024
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  5. [RISCV] Reorganize Mips cpu feature support 

    Remove zba and zbb.
Allow disabling ccmov with -mno-ccmov.
Make -mload-store-pairs imply l[w|d]p and s[w|d]p.
    @draganmladjenovic @BgZun
    draganmladjenovic authored and BgZun committed Mar 6, 2024
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  6. [RISCV] Add RemoveBackToBackBranches Pass 

    According to the MIPS specification, there shouldn't be
two conditional branches in the same 8-byte aligned
region of code.
    @BgZun
    Djordje Todorovic authored and BgZun committed Mar 6, 2024
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Commits on Mar 21, 2024

  1. [RISCV] Options for Load/Store pairs

    @jdmitrovic-syrmia @BgZun
    jdmitrovic-syrmia authored and BgZun committed Mar 21, 2024
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