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Memristor modeling artifacts (including a model for use with LTspice)

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Memristor Modeling repo

Includes a SPICE model suitable for use with LTspice

By Martin Falatic (www.Falatic.com)

Except where otherwise noted, my contributions are licensed under the MIT license (see the LICENSE file for details).

Originally released via web 2013-01-10:

http://www.falatic.com/index.php/69/memristor-simulation-with-ltspice-a-practical-example

These examples are provided for informational purposes ONLY No warranty is expressed or implied

I'd been curious about memristors for a while, and decided to see if I could model one in LTspice (since I didn't find one there). This is the result. This is not by any means definitive, just an example of the memristor as described in one of the more well-known papers on the subject.

This was most recently tested successfully with LTspice64 17.1.6 (see install notes).

https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html

Installation - for LTspice64 on Windows (should be similar for other platforms)

  • Install LTspice64 and browse to %LOCALAPPDATA%\LTspice\lib
  • Clone this repo and browse to LTspice_model
  • Copy the files from lib\sub and lib\sym to their respective LTspice sub and sym directories

Simulation

  • Open this memristor_sim.asc
  • Select "Simulate" -> "Run"
  • The output should match what you see in the memristor_sim_example.png file
  • If the plot settings didn't load automatically:
    • Click on the graph tab
    • Select "Plot Settings" -> "Open Plot Settings File"
    • Select memristor_sim.plt

Notes

  • The simulation here uses p=10 as noted in the original paper (Fig. 5), but per issue #1 using p=1 is more consistent with the graphs there. This may be a typo in the paper.

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