Fix the QIR base profile lowering to handle single qubit allocations …

…and (#474)

* Fix the QIR base profile lowering to handle single qubit allocations and
multiple allocations.

This does not perform any live range analysis and assumes that all
qubits for the kernel are allocated, logically, "in parallel" making
them all distinct and assigning each a unique integer.

These changes harden the QIR base profile generation pass, making it
correct even when other preconditioning passes are absent.

Add test.

Remove singleton deallocs. Handle singleton allocations.

* Fix 81-char line.

include/cudaq/Optimizer/CodeGen/Passes.td

@@ -83,18 +83,6 @@ def QIRToBaseQIR : Pass<"qir-to-base-qir"> {
   }];
 
   let constructor = "cudaq::opt::createQIRToBaseProfilePass()";
-
-  let options = [
-    Option<"topDownProcessingEnabled", "top-down", "bool",
-           /*default=*/"true",
-           "Seed the worklist in general top-down order">,
-    Option<"enableRegionSimplification", "region-simplify", "bool",
-           /*default=*/"true",
-           "Seed the worklist in general top-down order">,
-    Option<"maxIterations", "max-iterations", "int64_t",
-           /*default=*/"10",
-           "Seed the worklist in general top-down order">
-  ];
 }
 
 #endif // CUDAQ_OPT_OPTIMIZER_CODEGEN_PASSES

include/cudaq/Optimizer/CodeGen/Peephole.td

@@ -4,7 +4,7 @@
  *                                                                             *
  * This source code and the accompanying materials are made available under    *
  * the terms of the Apache License 2.0 which accompanies this distribution.    *
- *******************************************************************************/
+ ******************************************************************************/
 
 #ifndef NVQPP_OPTIMIZER_CODEGEN_PEEPHOLE
 #define NVQPP_OPTIMIZER_CODEGEN_PEEPHOLE
@@ -74,22 +74,6 @@ def CalleeConv : Pat<
 def IsArrayGetElementPtrId : Constraint<CPred<
     "$0.getValue().str() == cudaq::opt::QIRArrayGetElementPtr1d">>;
 
-def CreateIntToPtrOp : NativeCodeCall<
-    "$_builder.create<mlir::LLVM::IntToPtrOp>($_loc, $0.getType(), $1[1]);">;
-
-// %5 = ?
-// %6 = call @QIRArrayGetElementPtr %2, %5
-// %7 = bitcast %6
-// %8 = load %7, ...
-// ───────────────────────────────────────
-// %8 = inttoptr %5
-def ArrayGetElementPtrConv : Pat<
-    (LLVM_LoadOp:$load (LLVM_BitcastOp (LLVM_CallOp $callee, $args, $_, $_)), $_,
-                       $_, $_, $_, $_, $_),
-    (CreateIntToPtrOp $load, $args), [(IsArrayGetElementPtrId $callee)]>;
-
-//===----------------------------------------------------------------------===//
-
 def EraseArrayGEPOp : NativeCodeCall<
     "$_builder.create<mlir::LLVM::UndefOp>($_loc,"
     "  cudaq::opt::getQubitType($_builder.getContext()))">;
@@ -111,19 +95,21 @@ def EraseArrayAllocateOp : NativeCodeCall<
 //
 // %0 = call @allocate ... : ... -> T*
 // ───────────────────────────────────
-// %0 = inttoptr ~0 : i64 -> T*
+// %0 = undef : T*
 def EraseArrayAlloc : Pat<
     (LLVM_CallOp $callee, $_, $_, $_), (EraseArrayAllocateOp),
     [(IsaAllocateCall $callee)]>;
 
 //===----------------------------------------------------------------------===//
 
 def IsaReleaseCall : Constraint<CPred<
-    "$0.getValue().str() == cudaq::opt::QIRArrayQubitReleaseArray">>;
+    "$0.getValue().str() == cudaq::opt::QIRArrayQubitReleaseArray || "
+    "$0.getValue().str() == cudaq::opt::QIRArrayQubitReleaseQubit">>;
 
 def EraseArrayReleaseOp : NativeCodeCall<"static_cast<std::size_t>(0)">;
 
-// Remove the release calls.
+// Remove the release calls. This removes both array allocations as well as
+// qubit singletons.
 //
 // call @release %5 : (!Qubit) -> ()
 // ─────────────────────────────────