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Extended support of Alveo boards by BSC #150

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@alekrop alekrop commented Jul 12, 2024

Here is a suggested support of 3 types of AMD Alveo boards: U55C, U280, U250. It is based on embedded meep_shell which includes QDMA based PCIe inteface, 2 kinds of supported DRAM: DDR and HBM, support of multi-MC (Memory Controllers) connection to HBM utilizing free NOC ports of edge tiles. Apart of this the contribution includes modified NOC-AXI4 bridge, 100GbE solution based on Ultrascale+ CMAC hard-macro+QSFP and AXI-DMA, BSCAN based small JTAG shell. Support of Alveo boards is provided as independent of Vivado versions. The last checked Vivado version is 2024.1. The bitstream built in different configurations and utilizing all above is Linux bootable.

Alexander Kropotov added 30 commits September 19, 2023 12:17
…or boot through it (normally is auto-generated by protosyn with option --uart-dmw) since MEEP shell anyway needs it despite doesn't support such UART mode.
… SD initialization starts instead of OSBI+Linux boot.
…onstream works, normal Linux boot doesn't start yet.
…memory" in bootrom asm code, otherwise Linux is not booted for build under MEEP shell.
…rocess instead of fixed one, dependent on MSG_LENGTH field in the header (like it is done in deser process for data write).
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alekrop commented Oct 1, 2024

Hi @Jbalkind , sorry for a delay. Some update is here: now Ariane patching is done through git apply. Here is ariane.patch .

Alexander Kropotov added 20 commits October 2, 2024 22:34
…e containing sw test application, 100GbE uB-based prototype design.
…rable in meaning of AXI protocol and data width.
…`virtual` tag in `devices.xml` instead of physical access through ncmem `noc_axi4_bridge`.
…N_RUNTIME_NCMEM` since physical `ncmem` connection to DRAM is excluded in favor of logical connection of non-cached `dma_pool` device to DRAM through `virtual` tag in `devices.xml`.
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6 participants