Merge #19115 #19116

19115: boards/hip-badge: fix doc rendering r=benpicco a=benpicco 19116: makefiles/cargo-targets.inc.mk: Fix RISC-V target r=kaspar030 a=maribu ### Contribution description Update the list of target triples to match `makefiles/arch/riscv.inc.mk`. This fixes compilation with toolchains other than the obsolete toolchain that uses the incorrect `riscv-none-embed` triple. ### Testing procedure ``` make BOARD=hifive1b -C examples/rust-gcoap ``` Fails on `master` with a recent RISC-V toolchain, but hopefully compiles with this PR. ### Issues/PRs references None Co-authored-by: Benjamin Valentin <[email protected]> Co-authored-by: Marian Buschsieweke <[email protected]>
RIOT-OS · Jan 9, 2023 · de0bd97 · de0bd97
3 parents bb708e2 + e62a415 + 4a00835
commit de0bd97
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diff --git a/boards/hip-badge/doc.txt b/boards/hip-badge/doc.txt
@@ -1,17 +1,8 @@
-/*
- * Copyright (C) 2023 Benjamin Valentin
- *
- * This file is subject to the terms and conditions of the GNU Lesser
- * General Public License v2.1. See the file LICENSE in the top level
- * directory for more details.
- */
-
 /**
- * @defgroup    boards_hip_badge HiP Badge
- * @ingroup     boards_esp32c3
- * @brief       Support for the Hacking in Parallel Badge
- * @author      Benjamin Valentin <[email protected]>
- */
+@defgroup    boards_hip_badge HiP Badge
+@ingroup     boards_esp32c3
+@brief       Support for the Hacking in Parallel Badge
+@author      Benjamin Valentin <[email protected]>
 
 The HiP Badge is a board that was given to participants of the 2022 *Hacking in Parallel* event.
 
@@ -60,3 +51,5 @@ The event (and badge) were organized on short notice (6 Weeks), so there are som
 
  - [Badge Clinic](https://wiki.hip-berlin.de/index.php?title=Badge_Clinic)
  - [Design files](https://gitlab.com/tidklaas/hip-badge/)
+
+ */
diff --git a/makefiles/cargo-targets.inc.mk b/makefiles/cargo-targets.inc.mk
@@ -28,8 +28,16 @@ $(CARGO_COMPILE_COMMANDS): $(BUILDDEPS)
 	$(Q)DIRS="$(DIRS)" APPLICATION_BLOBS="$(BLOBS)" \
 	  "$(MAKE)" -C $(APPDIR) -f $(RIOTMAKE)/application.inc.mk compile-commands
 	@# replacement addresses https://github.com/rust-lang/rust-bindgen/issues/1555
+	@# Keep triples in sync with makefiles/arch/riscv.inc.mk
 	$(Q)$(RIOTTOOLS)/compile_commands/compile_commands.py $(CARGO_COMPILE_COMMANDS_FLAGS) $(BINDIR) \
-	  | sed 's/"riscv-none-embed"/"riscv32"/g' \
+	  | sed -e 's/"riscv32-none-elf"/"riscv32"/g' \
+	        -e 's/"riscv-none-elf"/"riscv32"/g' \
+	        -e 's/"riscv32-unknown-elf"/"riscv32"/g' \
+	        -e 's/"riscv32-elf"/"riscv32"/g' \
+	        -e 's/"riscv64-none-elf"/"riscv32"/g' \
+	        -e 's/"riscv64-unknown-elf"/"riscv32"/g' \
+	        -e 's/"riscv64-elf"/"riscv32"/g' \
+	        -e 's/"riscv-none-embed"/"riscv32"/g' \
 	  | $(LAZYSPONGE) $@