boards/nucleo-{f207zg,f746zg,f767zi}: periph_conf

Fix PHY address in eth_config. It should be 0 for these boards, not 1. This is why previously the link status read out worked with an hard code PHY address 0 before. Some dubious references for 0 being the correct PHY address and not 1 (in absence of proper references): https://www.carminenoviello.com/2016/01/22/getting-started-stm32-nucleo-f746zg/ https://community.st.com/s/question/0D50X00009XkgfISAR/stm32f767-nucleo-ethernet-not-working
RIOT-OS · Oct 12, 2020 · e9361ed · e9361ed
1 parent a65b4e1
commit e9361ed
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/boards/nucleo-f207zg/include/periph_conf.h b/boards/nucleo-f207zg/include/periph_conf.h
@@ -241,7 +241,7 @@ static const eth_conf_t eth_config = {
     .speed = ETH_SPEED_100TX_FD,
     .dma = 6,
     .dma_chan = 8,
-    .phy_addr = 0x01,
+    .phy_addr = 0x00,
     .pins = {
         GPIO_PIN(PORT_G, 13),
         GPIO_PIN(PORT_B, 13),

diff --git a/boards/nucleo-f746zg/include/periph_conf.h b/boards/nucleo-f746zg/include/periph_conf.h
@@ -212,7 +212,7 @@ static const eth_conf_t eth_config = {
     .speed = ETH_SPEED_100TX_FD,
     .dma = 7,
     .dma_chan = 8,
-    .phy_addr = 0x01,
+    .phy_addr = 0x00,
     .pins = {
         GPIO_PIN(PORT_G, 13),
         GPIO_PIN(PORT_B, 13),

diff --git a/boards/nucleo-f767zi/include/periph_conf.h b/boards/nucleo-f767zi/include/periph_conf.h
@@ -160,7 +160,7 @@ static const eth_conf_t eth_config = {
     .speed = ETH_SPEED_100TX_FD,
     .dma = 3,
     .dma_chan = 8,
-    .phy_addr = 0x01,
+    .phy_addr = 0x00,
     .pins = {
         GPIO_PIN(PORT_G, 13),
         GPIO_PIN(PORT_B, 13),