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cpu, boards: add stm32c0 #20939

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7 changes: 2 additions & 5 deletions boards/nucleo-c031c6/include/periph_conf.h
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ static const uart_conf_t uart_config[] = {
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF0,
.tx_af = GPIO_AF0,
.bus = APB12, //?
.bus = APB12,
.irqn = USART1_IRQn,
},
};
Expand Down Expand Up @@ -103,9 +103,6 @@ static const uart_conf_t uart_config[] = {
* For Nucleo-C031C6 this information is in board manual,
* Table 11, page 20.
*
* STM32C031C6 do not have internal channel for VBAT, more details provided
* in the MCU datasheet - section 3.14, page 20.
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Is this no longer true?

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It is true that C0 does not have an internal channel for VBAT. It is not true that more details are provided in the datasheet.

At the time of the initial C011 and C031 support, this was a relevant difference from other ST parts (like the G0 family), but now it seems that it's common to all the C0 family parts. I figured it wasn't good practice to list all the things the micro doesn't have as that list would forever be incomplete. :)

*
* @{
*/
static const adc_conf_t adc_config[] = {
Expand All @@ -124,7 +121,7 @@ static const adc_conf_t adc_config[] = {
* @name PWM configuration
* @{
*
* To find appriopate device and channel find in the MCU datasheet table
* To find appropriate device and channel find in the MCU datasheet table
* concerning "Alternate function AF0 to AF7" a text similar to TIM[X]_CH[Y],
* where:
* TIM[X] - is device,
Expand Down
17 changes: 17 additions & 0 deletions boards/nucleo-c071rb/Kconfig
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@@ -0,0 +1,17 @@
# Copyright (C) 2024 BISSELL Homecare, Inc.
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#

config BOARD
default "nucleo-c071rb" if BOARD_NUCLEO_C031C6

config BOARD_NUCLEO_C071RB
bool
default y
select BOARD_COMMON_NUCLEO64
select CPU_MODEL_STM32C071RB

source "$(RIOTBOARD)/common/nucleo64/Kconfig"
4 changes: 4 additions & 0 deletions boards/nucleo-c071rb/Makefile
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@@ -0,0 +1,4 @@
MODULE = board
DIRS = $(RIOTBOARD)/common/nucleo

include $(RIOTBASE)/Makefile.base
1 change: 1 addition & 0 deletions boards/nucleo-c071rb/Makefile.dep
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
include $(RIOTBOARD)/common/nucleo64/Makefile.dep
16 changes: 16 additions & 0 deletions boards/nucleo-c071rb/Makefile.features
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@@ -0,0 +1,16 @@
CPU = stm32
CPU_MODEL = stm32c071rb

# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += riotboot

# load the common Makefile.features for Nucleo boards
include $(RIOTBOARD)/common/nucleo64/Makefile.features
2 changes: 2 additions & 0 deletions boards/nucleo-c071rb/Makefile.include
Original file line number Diff line number Diff line change
@@ -0,0 +1,2 @@
# load the common Makefile.include for Nucleo boards
include $(RIOTBOARD)/common/nucleo64/Makefile.include
52 changes: 52 additions & 0 deletions boards/nucleo-c071rb/doc.txt
Original file line number Diff line number Diff line change
@@ -0,0 +1,52 @@
/**
@defgroup boards_nucleo-c071rb STM32 Nucleo-c071rb
@ingroup boards_common_nucleo64
@brief Support for the STM32 Nucleo-c071rb

## Overview

The Nucleo-c071rb is a board from ST's Nucleo family supporting a ARM
Cortex-M0+ STM32C071RB microcontroller with 24KiB of RAM and 128KiB of Flash.

## Pinout

See Board Manual referenced below, section 7 pages 19-21.

### MCU

| MCU | STM32c071rb |
|:---------- |:------------------- |
| Family | ARM Cortex-M0+ |
| Vendor | ST Microelectronics |
| RAM | 24KiB |
| Flash | 128KiB |
| Frequency | up to 48MHz |
| FPU | no |
| Timers | 12 (2x watchdog, 1 SysTick, 5x 16-bit) |
| ADCs | 1x 12-bit (up to 19 channels) |
| UARTs | 2 |
| SPIs | 1 |
| I2Cs | 1 |
| RTC | 1 |
| Vcc | 2.0V - 3.6V |
| Datasheet | [Datasheet](https://www.st.com/resource/en/datasheet/stm32c071rb.pdf) |
| Reference Manual | [Reference Manual](https://www.st.com/resource/en/reference_manual/rm0490-stm32c0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) |
| Programming Manual | [Programming Manual](https://www.st.com/resource/en/programming_manual/pm0223-stm32-cortexm0-mcus-programming-manual-stmicroelectronics.pdf) |
| Board Manual | [Board Manual](https://www.st.com/resource/en/user_manual/um3353-stm32-nucleo64-board-mb2046-stmicroelectronics.pdf) |

## Flashing the Board Using ST-LINK Removable Media

On-board ST-LINK programmer provides via composite USB device removable media.
Copying the HEX file causes reprogramming of the board. This task
could be performed manually; however, the cpy2remed (copy to removable
media) PROGRAMMER script does this automatically. To program board in
this manner, use the command:

```
make BOARD=nucleo-c071rb PROGRAMMER=cpy2remed flash
```

@note This PROGRAMMER was tested using ST-LINK firmware 2.37.26. Firmware updates
could be found on [this STM webpage](https://www.st.com/en/development-tools/stsw-link007.html).

*/
179 changes: 179 additions & 0 deletions boards/nucleo-c071rb/include/periph_conf.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,179 @@
/*
* Copyright (C) 2024 BISSELL Homecare, Inc.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/

/**
* @ingroup boards_nucleo-c071rb
* @{
*
* @file
* @brief Peripheral MCU configuration for the nucleo-c031c6 board
*
* @author Jason Parker <[email protected]>
*/

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

/* Add specific clock configuration (HSE, LSE) for this board here */
#ifndef CONFIG_BOARD_HAS_LSE
#define CONFIG_BOARD_HAS_LSE 1
#endif

#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"

#ifdef __cplusplus
extern "C" {
#endif

/**
* @name Timer configuration
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM3,
.max = 0x0000ffff,
.rcc_mask = RCC_APBENR1_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};

#define TIMER_0_ISR isr_tim3

#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */

/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APBENR1_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn,
},
{ /* Arduino pinout on D0/D1 */
.dev = USART1,
.rcc_mask = RCC_APBENR2_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF0,
.tx_af = GPIO_AF0,
.bus = APB12,
.irqn = USART1_IRQn,
},
};

#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)

#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */

/**
* @name ADC configuration
*
* Note that we do not configure all ADC channels,
* and not in the STM32C071 order. Instead, we
* just define 6 ADC channels, for the Nucleo
* Arduino header pins A0-A5.
*
* To find appropriate device and channel find in the
* board manual, table showing pin assignments and
* information about ADC - a text similar to ARD_A[N]_IN[X],
* where:
* [N] - describes analog pin number,
* [X] - describes used channel - indexed from 1,
* for example ARD_A5_IN16 is channel 16
*
* For Nucleo-C071RB this information is in board manual,
* Table 11, page 20.
*
* @{
*/
static const adc_conf_t adc_config[] = {
{ .pin = GPIO_PIN(PORT_A, 0), .dev = 0, .chan = 0 }, /* ARD_A0_IN0 */
{ .pin = GPIO_PIN(PORT_A, 1), .dev = 0, .chan = 1 }, /* ARD_A1_IN1 */
{ .pin = GPIO_PIN(PORT_A, 4), .dev = 0, .chan = 4 }, /* ARD_A2_IN4 */
{ .pin = GPIO_PIN(PORT_B, 0), .dev = 0, .chan = 17 }, /* ARD_A3_IN17 */
{ .pin = GPIO_PIN(PORT_C, 4), .dev = 0, .chan = 11 }, /* ARD_A4_IN11 */
{ .pin = GPIO_PIN(PORT_C, 5), .dev = 0, .chan = 12 }, /* ARD_A5_IN12 */
};

#define ADC_NUMOF ARRAY_SIZE(adc_config)
/** @} */

/**
* @name PWM configuration
* @{
*
* To find appropriate device and channel find in the MCU datasheet table
* concerning "Alternate function AF0 to AF7" a text similar to TIM[X]_CH[Y],
* where:
* TIM[X] - is device,
* [Y] - describes used channel (indexed from 0), for example TIM2_CH1 is
* channel 0 in configuration structure (cc_chan - field),
* Port column in the table describes connected port.
*
* For Nucleo-c071rb this information is in the MCU datasheet, Table 13, page 35.
*
*/
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM3,
.rcc_mask = RCC_APBENR1_TIM3EN,
.chan = { { .pin = GPIO_PIN(PORT_B, 5) /*CN9 D6 */, .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_B, 0) /*CN5 D10 */, .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_B, 1) /*CN8 A3 */, .cc_chan = 3 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
.af = GPIO_AF1,
.bus = APB1
},
};

#define PWM_NUMOF ARRAY_SIZE(pwm_config)
/** @} */

/**
* @name SPI configuration
* @{
*/
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
.miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
.sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
.cs_pin = GPIO_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APBENR2_SPI1EN,
.apbbus = APB12,
},
};

#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */

#ifdef __cplusplus
}
#endif

#endif /* PERIPH_CONF_H */
/** @} */
14 changes: 14 additions & 0 deletions boards/stm32c0116-dk/Kconfig
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
# Copyright (C) 2024 BISSELL Homecare, Inc.
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#

config BOARD
default "stm32c0116-dk" if BOARD_STM32C0116_DK

config BOARD_STM32C0116_DK
bool
default y
select CPU_MODEL_STM32C011F6
3 changes: 3 additions & 0 deletions boards/stm32c0116-dk/Makefile
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
MODULE = board

include $(RIOTBASE)/Makefile.base
Empty file.
6 changes: 6 additions & 0 deletions boards/stm32c0116-dk/Makefile.features
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
CPU = stm32
CPU_MODEL = stm32c011f6

# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
18 changes: 18 additions & 0 deletions boards/stm32c0116-dk/Makefile.include
Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
# we use shared STM32 configuration snippets
INCLUDES += -I$(RIOTBASE)/boards/common/stm32/include

# define the default port depending on the host OS
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))

# setup serial terminal
include $(RIOTMAKE)/tools/serial.inc.mk

PROGRAMMER ?= openocd
OPENOCD_DEBUG_ADAPTER ?= stlink

# openocd programmer is supported
PROGRAMMERS_SUPPORTED += openocd

# this board uses openocd
include $(RIOTMAKE)/tools/openocd.inc.mk
7 changes: 7 additions & 0 deletions boards/stm32c0116-dk/dist/openocd.cfg
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
set WORKAREASIZE 0x2000
source [find interface/stlink-v2.cfg]
source [find target/stm32c0x.cfg]

#reset_config srst_only
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Can be dropped?

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Looking into this, the lines-

source [find target/stm32c0x.cfg]
reset_config srst_only
$_TARGETNAME configure -rtos auto

are included in https://github.com/RIOT-OS/RIOT/blob/master/boards/common/stm32/dist/stm32c0.cfg so I'm betting they can be removed from the various C0 board openocd.cfg files?


#$_TARGETNAME configure -rtos auto
Comment on lines +5 to +7
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Why commented out?

35 changes: 35 additions & 0 deletions boards/stm32c0116-dk/doc.txt
Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
/**
* @defgroup boards_stm32c0116-dk STM32C0116-DK
* @ingroup boards
* @brief Support for the STM32C0116-DK board.
*
* ### General information
*
* The ST [STM32C0116-DK](https://www.st.com/en/evaluation-tools/stm32c0116-dk.html)
* is an evaluation board supporting a ARM Cortex-M0 STM32C011F6 microcontroller
* with 8KB of RAM and 32KB of ROM Flash.
*
* ### Pinout
*
* See [this application note as reference](https://www.st.com/resource/en/application_note/an5673-getting-started-with-stm32c0-mcu-hardware-development-stmicroelectronics.pdf).
* This means the responsibility is on the firmware configurer to take special care when configured IO, ensuring that
* ports are not conflicting on each pin.
*
* ### Flash the board
*
* The STM32C0116-DK board includes an on-board ST-LINK programmer and can be
* flashed using OpenOCD.
*
* To flash this board, just use the following command:
*
* ```
* make BOARD=stm32c0116-dk flash -C examples/hello-world
* ```
*
* ### UART Terminal Interaction
*
* Due to the limited number of pins, to get stdio UART traffic, use a USB->UART adapter
* like the CP2104 from Adafruit (http://adafru.it/954). Connect the adapter's TX line
* to the MCU RX pin (PB6, Pin 8) and the adapter's RX line to the MCU's TX pin -
* (PB7, pin 1)
*/
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