DP83826 error fix

TexasInstruments · Dec 16, 2024 · ff9da6f · ff9da6f
1 parent f072332
commit ff9da6f
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Showing 4 changed files with 14 additions and 14 deletions.
diff --git a/rtos_drivers/include/dp83826.h b/rtos_drivers/include/dp83826.h
@@ -34,14 +34,14 @@
  * \file  dp83826.h
  *
  * \brief This file contains the type definitions and helper macros for the
- *        dp83826 Ethernet PHY.
+ *        DP83826 Ethernet PHY.
  */
 
 /*!
  * \ingroup  DRV_ENETPHY
- * \defgroup ENETPHY_dp83826 TI dp83826 PHY
+ * \defgroup ENETPHY_DP83826 TI DP83826 PHY
  *
- * TI dp83826 RMII Ethernet PHY.
+ * TI DP83826 RMII Ethernet PHY.
  *
  * @{
  */

diff --git a/rtos_drivers/include/dp83tg720.h b/rtos_drivers/include/dp83tg720.h
@@ -119,11 +119,11 @@ typedef struct Dp83tg720_Cfg_s
 /* ========================================================================== */
 
 /*!
- * \brief Initialize DP83TC811 PHY specific config params.
+ * \brief Initialize DP83TG720 PHY specific config params.
  *
- * Initializes the DP83TC811 PHY specific configuration parameters.
+ * Initializes the DP83TG720 PHY specific configuration parameters.
  *
- * \param cfg       DP83TC811 PHY config structure pointer
+ * \param cfg       DP83TG720 PHY config structure pointer
  */
 void Dp83tg720_initCfg(Dp83tg720_Cfg *cfg);
 

diff --git a/rtos_drivers/include/phy_common.h b/rtos_drivers/include/phy_common.h
@@ -32,7 +32,7 @@
 
 /*!
  * \ingroup DRV_ENETPHY
- * \defgroup PHY_COMMON_H TI ENET PHY
+ * \defgroup PHY_COMMON_H TI PHY COMMON
  *
  * TI PHY COMMON for Ethernet PHY.
  *
@@ -283,7 +283,7 @@ typedef struct
         /*!
          * \brief PHY bind.
          *
-         * PHY-specific function that binds the driver handle adnd register 
+         * PHY-specific function that binds the driver handle and register 
          * access functions to specific PHY device.
          *
          * \param hPhy              PHY device handle

diff --git a/rtos_drivers/src/dp83826.c b/rtos_drivers/src/dp83826.c
@@ -275,16 +275,16 @@ static void Dp83826_rmwExtReg(EthPhyDrv_Handle hPhy,
     PHYTRACE_VERBOSE("PHY %u: write reg %u mask 0x%04x val 0x%04x\r\n",
                       PhyPriv_getPhyAddr(hPhy), reg, mask, val);
 
-    pRegAccessApi->EnetPhy_writeReg(hPhy, PHY_MMD_CR, devad | MMD_CR_ADDR);
-    pRegAccessApi->EnetPhy_writeReg(hPhy, PHY_MMD_DR, reg);
-    pRegAccessApi->EnetPhy_writeReg(hPhy, PHY_MMD_CR, devad | MMD_CR_DATA_NOPOSTINC);
-    status = pRegAccessApi->EnetPhy_readReg(hPhy, PHY_MMD_DR, &data);
+    pRegAccessApi->EnetPhy_writeReg(pRegAccessApi->pArgs, PHY_MMD_CR, devad | MMD_CR_ADDR);
+    pRegAccessApi->EnetPhy_writeReg(pRegAccessApi->pArgs, PHY_MMD_DR, reg);
+    pRegAccessApi->EnetPhy_writeReg(pRegAccessApi->pArgs, PHY_MMD_CR, devad | MMD_CR_DATA_NOPOSTINC);
+    status = pRegAccessApi->EnetPhy_readReg(pRegAccessApi->pArgs, PHY_MMD_DR, &data);
 
 
     if (status == PHY_SOK)
     {
         data = (data & ~mask) | (val & mask);
-        pRegAccessApi->EnetPhy_writeReg(hPhy, PHY_MMD_CR, devad | MMD_CR_DATA_NOPOSTINC);
-        pRegAccessApi->EnetPhy_writeReg(hPhy, PHY_MMD_DR, data);
+        pRegAccessApi->EnetPhy_writeReg(pRegAccessApi->pArgs, PHY_MMD_CR, devad | MMD_CR_DATA_NOPOSTINC);
+        pRegAccessApi->EnetPhy_writeReg(pRegAccessApi->pArgs, PHY_MMD_DR, data);
     }
 }