- SpinalHDL design which compiles to Verilog or VHDL of a PowerPC 3.0B processor that implements just enough instructions to run micropython.
- Fmax of ~50Mhz on ECP5 if I remember correctly.
- Uses custom branch of SpinalHDL.
- At this point, I don't plan to complete this processor, but rather, plan to do a new implementation in BlueSpec. This paper demonstrates the power of bluespec for out-of-order processor design.
cd ../
git clone [email protected]:chipeleven/spinalhdl.git SpinalHDL
cd SpinalHDL
git checkout onehot-switch
sbt clean publishLocal
sbt test
gtkwave waves/BusTimer/test.vcd
sbt "testOnly util.PipeStageTest"