Synchronize writes to HCR_EL2

Instruction barrier was missed after a write to hcr_el2 which causes intermittent hangs on Snapdragon X Elite socs due to ooo. Add the barrier and while at it, drop the barrier after setting daif since that operation is synchronizing anyway. Co-authored-by: Marc Zyngier <[email protected]>
TravMurav · Oct 19, 2024 · d3ae5db · d3ae5db
1 parent 9fa5667
commit d3ae5db
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/trans.s b/src/trans.s
@@ -32,7 +32,6 @@ tb_entry:
 
 	/* Make sure interrupts are disabled too */
 	msr	daifset, #0b1111
-	isb
 
 	ldr	x1, [x9, #8]		// tb_data->sp holds framebuffer base
 	ldr	x2, [x9, #16]		// tb_data->tcr holds framebuffer stride
@@ -160,6 +159,7 @@ tb_longjmp:
 	/* ArchInitialize() */
 	movq	x2, (HCR_EL2_TGE | HCR_EL2_E2H)
 	msr	hcr_el2, x2
+	isb
 
 	mov	x2, #(CNTHCTL_EL2_EL1PCTEN | CNTHCTL_EL2_EL1PCEN)
 	msr	cnthctl_el2, x2