DevContrib/02&03: Update logo and header

Xilinx · Jan 13, 2023 · f6bdfbd · f6bdfbd
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diff --git a/Developer_Contributed/02-AIE_DSP_with_Makefile_and_GUI/README.md b/Developer_Contributed/02-AIE_DSP_with_Makefile_and_GUI/README.md
@@ -7,15 +7,15 @@ SPDX-License-Identifier: MIT
 Author: Daniele Bagni, Xilinx Inc
 -->
 
-
-<div style="page-break-after: always;"></div>
-<table style="width:100%">
-  <tr>
-    <th width="100%" colspan="6"><img src="https://www.xilinx.com/content/dam/xilinx/imgs/press/media-kits/corporate/xilinx-logo.png" width="30%"/><h1> DSP Design on AI Engine Technology with GUI and Makefile Flows</h1>
-</th>
-  </tr>
+<table class="sphinxhide" width="100%">
+ <tr width="100%">
+    <td align="center"><img src="https://raw.githubusercontent.com/Xilinx/Image-Collateral/main/xilinx-logo.png" width="30%"/><h1>Vitis™ In-Depth Tutorials</h1>
+    </td>
+ </tr>
 </table>
-</div>
+
+# DSP Design on AI Engine Technology with GUI and Makefile Flows
+
 
 ***Version: Vitis 2022.1***
 

diff --git a/Developer_Contributed/03-HLS_Code_Optimization/README.md b/Developer_Contributed/03-HLS_Code_Optimization/README.md
@@ -7,14 +7,14 @@ Author: Daniele Bagni, Xilinx Inc
 -->
 
 
-<div style="page-break-after: always;"></div>
-<table style="width:100%">
-  <tr>
-    <th width="100%" colspan="6"><img src="https://www.xilinx.com/content/dam/xilinx/imgs/press/media-kits/corporate/xilinx-logo.png" width="30%"/><h1> Optimization Techniques for Vitis HLS and HW Acceleration on Embedded Boards</h1>
-</th>
-  </tr>
+<table class="sphinxhide" width="100%">
+ <tr width="100%">
+    <td align="center"><img src="https://raw.githubusercontent.com/Xilinx/Image-Collateral/main/xilinx-logo.png" width="30%"/><h1>Vitis™ In-Depth Tutorials</h1>
+    </td>
+ </tr>
 </table>
-</div>
+
+# Optimization Techniques for Vitis HLS and HW Acceleration on Embedded Boards
 
 
 ***Version: Vitis 2022.1***