Skip to content

Issues: Xilinx/mlir-aie

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

77 Open 132 Closed
77 Open 132 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

Potential Errors with Linking Object FIFO's with different sizes with Transfomations bug Something isn't working triaged This has been looked at and triaged
#1980 opened Dec 16, 2024 by iavssw
@AndraBisca
Iterating multiple times over a buffer object
#1976 opened Dec 13, 2024 by antonio-fc
3
Some questions about the number of Compute tiles? triaged This has been looked at and triaged
#1964 opened Dec 10, 2024 by ngdymx
@AndraBisca @pvasireddy-amd
6
sliding_window_conditional: python version not working
#1959 opened Dec 5, 2024 by pvasireddy-amd
@AndraBisca @pvasireddy-amd
Building matmul single-core with trace enabled leads to intermittent failures bug Something isn't working
#1957 opened Dec 5, 2024 by jackl-xilinx
Error when running whole_array
#1954 opened Dec 3, 2024 by AJ-RR
@AndraBisca
1
"Per column" device types for npu2 (Strix) enhancement New feature or request good first issue Good for newcomers
#1949 opened Dec 2, 2024 by jgmelber
Could not run Programming Examples on HX 370 IRON triaged This has been looked at and triaged
#1946 opened Nov 26, 2024 by ngdymx
@jgmelber
9
Make RTP's atomic by generating a lock and changing it's state in the runtime_sequence enhancement New feature or request
#1938 opened Nov 20, 2024 by jgmelber
@jgmelber @endtaka-amd
1
Move hardcoded MemTile offsets for buffers and locks from AIERT.cpp to TargetModel
#1937 opened Nov 20, 2024 by jgmelber
@AndraBisca
Choose dimensions or sizes + strides for user-facing operations
#1922 opened Nov 15, 2024 by hunhoffe
2
aie.dma_bd (DMABDOp) parsing of optional attributes is fragile/buggy
#1921 opened Nov 15, 2024 by hunhoffe
Remove unnecessary custom printers and parsers from AIEVec ops good first issue Good for newcomers quality Improve code quality: maintainability, cleanup, code reorganization.
#1894 opened Oct 31, 2024 by jsetoain
Port PR #807 from iree-amd-aie
#1857 opened Oct 21, 2024 by jsetoain
@jsetoain
How to execute a VCK5000-based mlir-tutorial?
#1838 opened Oct 15, 2024 by shibizhao
@eddierichter-amd
9
How to convert AFFine to AIEvecde?
#1833 opened Oct 14, 2024 by pyl3000
@jsetoain
1
error: use of undeclared identifier 'hsa_amd_signal_create_on_agent'
#1793 opened Sep 25, 2024 by thhongee
@eddierichter-amd
4
Whole Matrix Multiply certain dims produces program memory overflow
#1773 opened Sep 14, 2024 by gregoryJ-amd
@AndraBisca
All example kernels execution result in ERT_CMD_STATE_ERROR on the Windows host
#1757 opened Sep 9, 2024 by fxmarty-amd
1
std::runtime_error -- what(): qds_device::wait() unexpected command state
#1751 opened Sep 5, 2024 by hecmay
5
Compiler strategy for reconfiguring AIE designs with control packets enhancement New feature or request
#1729 opened Aug 27, 2024 by erwei-xilinx
Compose shimDMAAllocationOps with ObjectFifoStatefulTransform
#1635 opened Jul 23, 2024 by AndraBisca
@AndraBisca
XCLBinGen silently emits at most 5 bos in kernels.json even if @sequence has more
#1564 opened Jun 14, 2024 by makslevental
@fifield
3
Request for making Matmul/Zero-Fill microkernel aware about offset and strides
#1478 opened May 10, 2024 by Abhishek-Varma
4
ASPLOS Tutorial XRT Build Issues
#1414 opened Apr 25, 2024 by ypapadop-amd
2
ProTip! Exclude everything labeled bug with -label:bug.