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Fix deprecation warnings (#571)
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fifield authored May 9, 2024
1 parent 85a99b3 commit 0c74222
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Showing 24 changed files with 405 additions and 420 deletions.
6 changes: 3 additions & 3 deletions mlir/include/air/Dialect/AIR/AIR.td
Original file line number Diff line number Diff line change
Expand Up @@ -426,21 +426,21 @@ def air_ChannelOp : air_Op<"channel", [Symbol]>,
int broadcastNum = 1;
if (isBroadcast())
for (auto bShape : getOperation()->getAttrOfType<ArrayAttr>("broadcast_shape")) {
auto attr = bShape.dyn_cast<IntegerAttr>().getInt();
auto attr = llvm::dyn_cast<IntegerAttr>(bShape).getInt();
broadcastNum *= attr;
}
return broadcastNum;
}
int getBufferResources() {
if(auto attr = getOperation()->getAttrOfType<IntegerAttr>("buffer_resources"))
return attr.dyn_cast<IntegerAttr>().getInt();
return llvm::dyn_cast<IntegerAttr>(attr).getInt();
else
return 1;
}
int getBundleSize() {
int size = 1;
for (auto i : getSize())
size *= i.dyn_cast<IntegerAttr>().getInt();
size *= llvm::dyn_cast<IntegerAttr>(i).getInt();
return size;
}
}];
Expand Down
2 changes: 1 addition & 1 deletion mlir/include/air/Dialect/AIR/AIROpBase.td
Original file line number Diff line number Diff line change
Expand Up @@ -88,7 +88,7 @@ def MemorySpace: I32EnumAttr<"MemorySpace", "AIR Memory Space IDs",
}

def air_AsyncToken : DialectType<
air_Dialect, CPred<"$_self.isa<xilinx::air::AsyncTokenType>()">, "async token type">,
air_Dialect, CPred<"llvm::isa<xilinx::air::AsyncTokenType>($_self)">, "async token type">,
BuildableType<"xilinx::air::AsyncTokenType::get($_builder.getContext())">;

def air_AsyncOpInterface : OpInterface<"AsyncOpInterface"> {
Expand Down
2 changes: 1 addition & 1 deletion mlir/include/air/Dialect/AIRRt/AIRRtBase.td
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ can be lowered to a combination of standard and LLVM dialects.
}

def AIRRt_Event : DialectType<
AIRRt_Dialect, CPred<"$_self.isa<xilinx::airrt::EventType>()">, "event type">,
AIRRt_Dialect, CPred<"llvm::isa<xilinx::airrt::EventType>($_self)">, "event type">,
BuildableType<"xilinx::airrt::EventType::get($_builder.getContext())">;

#endif // #ifndef AIRRT_BASE
2 changes: 1 addition & 1 deletion mlir/lib/CAPI/Dialects.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ MLIR_DEFINE_CAPI_DIALECT_REGISTRATION(AIR, air, xilinx::air::airDialect)
//===---------------------------------------------------------------------===//

bool mlirTypeIsAIRAsyncTokenType(MlirType type) {
return unwrap(type).isa<xilinx::air::AsyncTokenType>();
return llvm::isa<xilinx::air::AsyncTokenType>(unwrap(type));
}

MlirType mlirAIRAsyncTokenTypeGet(MlirContext ctx) {
Expand Down
67 changes: 34 additions & 33 deletions mlir/lib/Conversion/AIRLoweringPass.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -101,7 +101,7 @@ class AIRLaunchConversion : public ConversionPattern {
rewriter.setInsertionPoint(scfPar);
SmallVector<Value> deps;
for (auto &o : operands)
if (o.getType().isa<airrt::EventType>())
if (llvm::isa<airrt::EventType>(o.getType()))
deps.push_back(o);
rewriter.replaceOpWithNewOp<airrt::WaitAllOp>(
op, airrt::EventType::get(op->getContext()), deps);
Expand Down Expand Up @@ -170,7 +170,8 @@ class AIRSegmentConversion : public ConversionPattern {
rewriter.clone(o, remap);
} else if (auto chanOp = dyn_cast<air::ChannelInterface>(o)) {
// clone L3 get/put
MemRefType memrefTy = chanOp.getMemref().getType().cast<MemRefType>();
MemRefType memrefTy =
llvm::cast<MemRefType>(chanOp.getMemref().getType());
if (memrefTy.getMemorySpaceAsInt() == (int)air::MemorySpace::L3) {
rewriter.clone(o, remap);
continue;
Expand All @@ -190,7 +191,7 @@ class AIRSegmentConversion : public ConversionPattern {

SmallVector<Value> deps;
for (auto &o : operands)
if (o.getType().isa<airrt::EventType>())
if (llvm::isa<airrt::EventType>(o.getType()))
deps.push_back(o);
if (op->getNumResults()) {
rewriter.setInsertionPoint(op);
Expand Down Expand Up @@ -231,7 +232,7 @@ class AIRHerdConversion : public ConversionPattern {

SmallVector<Value, 4> deps;
for (auto &o : operands)
if (o.getType().isa<airrt::EventType>())
if (llvm::isa<airrt::EventType>(o.getType()))
deps.push_back(o);
if (op->getNumResults()) {
auto w = rewriter.create<airrt::WaitAllOp>(
Expand Down Expand Up @@ -320,7 +321,7 @@ class AIRPipelineGetConversion : public ConversionPattern {
auto getOp = cast<air::PipelineGetOp>(op);
SmallVector<Value, 2> gets;
for (auto r : getOp.getResults()) {
if (auto ty = r.getType().dyn_cast<RankedTensorType>())
if (auto ty = llvm::dyn_cast<RankedTensorType>(r.getType()))
gets.push_back(rewriter.create<bufferization::AllocTensorOp>(
op->getLoc(), ty, ValueRange{}));
else
Expand Down Expand Up @@ -361,14 +362,14 @@ class AIRDmaMemcpyNdToAIRRtConversion

SmallVector<Value, 4> deps;
for (auto o : adaptor.getOperands())
if (o.getType().isa<airrt::EventType>())
if (llvm::isa<airrt::EventType>(o.getType()))
deps.push_back(o);
if (deps.size())
rewriter.create<airrt::WaitAllOp>(
op->getLoc(), airrt::EventType::get(op->getContext()), deps);

MemRefType src = op.getSrcMemref().getType().cast<MemRefType>();
MemRefType dst = op.getDstMemref().getType().cast<MemRefType>();
MemRefType src = llvm::cast<MemRefType>(op.getSrcMemref().getType());
MemRefType dst = llvm::cast<MemRefType>(op.getDstMemref().getType());
bool isFromTile = false;
bool isFullMemcpy = false;
if (src.getMemorySpaceAsInt() == (int)air::MemorySpace::L1 &&
Expand Down Expand Up @@ -493,7 +494,8 @@ AIRChannelInterfaceToAIRRtConversionImpl(OpBuilder builder,
auto loc = thisOp->getLoc();
auto ctx = thisOp->getContext();

MemRefType thisMemrefType = thisOp.getMemref().getType().cast<MemRefType>();
MemRefType thisMemrefType =
llvm::cast<MemRefType>(thisOp.getMemref().getType());

bool thisOpIsInShim =
thisMemrefType.getMemorySpaceAsInt() == (int)xilinx::air::MemorySpace::L3;
Expand Down Expand Up @@ -523,9 +525,9 @@ AIRChannelInterfaceToAIRRtConversionImpl(OpBuilder builder,
// Broadcast channel control loop
assert(theOtherOp->hasAttr("tile"));
ArrayAttr tiles = theOtherOp->getAttrOfType<ArrayAttr>("tile");
auto tile_dict = tiles[0].cast<DictionaryAttr>();
auto row = tile_dict.get("row").cast<IntegerAttr>().getInt();
auto col = tile_dict.get("col").cast<IntegerAttr>().getInt();
auto tile_dict = llvm::cast<DictionaryAttr>(tiles[0]);
auto row = llvm::cast<IntegerAttr>(tile_dict.get("row")).getInt();
auto col = llvm::cast<IntegerAttr>(tile_dict.get("col")).getInt();
opers.push_back(builder.create<arith::ConstantOp>(
loc, i64Ty, IntegerAttr::get(i64Ty, col)));
opers.push_back(builder.create<arith::ConstantOp>(
Expand Down Expand Up @@ -627,7 +629,7 @@ class AIRChannelPutToAIRRtConversion
// Resolve channel op's dependency list
SmallVector<Value, 4> deps;
for (auto o : adaptor.getOperands())
if (o.getType().isa<xilinx::airrt::EventType>())
if (llvm::isa<xilinx::airrt::EventType>(o.getType()))
deps.push_back(o);
if (deps.size())
rewriter.replaceOpWithNewOp<xilinx::airrt::WaitAllOp>(
Expand Down Expand Up @@ -672,7 +674,7 @@ class AIRChannelGetToAIRRtConversion
// Resolve channel op's dependency list
SmallVector<Value, 4> deps;
for (auto o : adaptor.getOperands())
if (o.getType().isa<xilinx::airrt::EventType>())
if (llvm::isa<xilinx::airrt::EventType>(o.getType()))
deps.push_back(o);
if (deps.size())
rewriter.replaceOpWithNewOp<xilinx::airrt::WaitAllOp>(
Expand Down Expand Up @@ -712,7 +714,7 @@ class L2DeallocToAIRRtConversion : public ConversionPattern {
matchAndRewrite(Operation *op, ArrayRef<Value> operands,
ConversionPatternRewriter &rewriter) const override {
auto dealloc = cast<memref::DeallocOp>(op);
auto type = dealloc.getMemref().getType().cast<MemRefType>();
auto type = llvm::cast<MemRefType>(dealloc.getMemref().getType());
if (type.getMemorySpaceAsInt() == (int)air::MemorySpace::L2) {
rewriter.replaceOpWithNewOp<airrt::DeallocOp>(op, SmallVector<Type>{},
op->getOperands());
Expand Down Expand Up @@ -772,7 +774,7 @@ class ScfYieldOpConversion : public OpConversionPattern<scf::YieldOp> {
SmallVector<Value, 8> operands{adaptor.getOperands()};
SmallVector<Type, 2> retTys;
for (auto t : op->getResultTypes()) {
if (t.isa<air::AsyncTokenType>()) {
if (llvm::isa<air::AsyncTokenType>(t)) {
retTys.push_back(airrt::EventType::get(op->getContext()));
} else {
retTys.push_back(t);
Expand Down Expand Up @@ -813,7 +815,7 @@ class ScfReduceOpConversion : public OpConversionPattern<scf::ReduceOp> {
SmallVector<Value> opers;
for (int i = 0, e = o.getNumOperands(); i < e; i++) {
auto oper = remap.lookupOrDefault(o.getOperand(i));
if (oper.getType().isa<air::AsyncTokenType>()) {
if (llvm::isa<air::AsyncTokenType>(oper.getType())) {
auto ty = airrt::EventType::get(o.getContext());
auto cast = rewriter.create<UnrealizedConversionCastOp>(
op->getLoc(), ty, oper);
Expand All @@ -838,7 +840,7 @@ class ScfReduceReturnOpConversion
SmallVector<Value, 8> operands{adaptor.getOperands()};
SmallVector<Type, 2> retTys;
for (auto t : op->getResultTypes()) {
if (t.isa<air::AsyncTokenType>()) {
if (llvm::isa<air::AsyncTokenType>(t)) {
retTys.push_back(airrt::EventType::get(op->getContext()));
} else {
retTys.push_back(t);
Expand All @@ -859,7 +861,7 @@ class ScfIfOpConversion : public OpConversionPattern<scf::IfOp> {

SmallVector<Type, 2> retTys;
for (auto t : op->getResultTypes()) {
if (t.isa<air::AsyncTokenType>()) {
if (llvm::isa<air::AsyncTokenType>(t)) {
retTys.push_back(airrt::EventType::get(op->getContext()));
} else {
retTys.push_back(t);
Expand Down Expand Up @@ -917,7 +919,7 @@ class ScfForOpConversion : public OpConversionPattern<scf::ForOp> {
SmallVector<Value> opers;
for (int i = 0, e = o.getNumOperands(); i < e; i++) {
auto oper = remap.lookupOrDefault(o.getOperand(i));
if (oper.getType().isa<air::AsyncTokenType>()) {
if (llvm::isa<air::AsyncTokenType>(oper.getType())) {
auto ty = airrt::EventType::get(o.getContext());
auto cast = rewriter.create<UnrealizedConversionCastOp>(
op->getLoc(), ty, oper);
Expand All @@ -937,7 +939,7 @@ class ScfForOpConversion : public OpConversionPattern<scf::ForOp> {
rewriter.setInsertionPointAfter(newOp);
SmallVector<Value> newResults;
for (auto res : newOp->getResults()) {
if (res.getType().isa<airrt::EventType>()) {
if (llvm::isa<airrt::EventType>(res.getType())) {
auto ty = air::AsyncTokenType::get(op->getContext());
auto cast =
rewriter.create<UnrealizedConversionCastOp>(op->getLoc(), ty, res);
Expand All @@ -958,7 +960,7 @@ class ScfParOpConversion : public OpConversionPattern<scf::ParallelOp> {
ConversionPatternRewriter &rewriter) const override {
SmallVector<Value> newInitVals;
for (auto initVal : adaptor.getInitVals()) {
if (initVal.getType().isa<air::AsyncTokenType>()) {
if (llvm::isa<air::AsyncTokenType>(initVal.getType())) {
auto cast = rewriter.create<UnrealizedConversionCastOp>(
op->getLoc(), airrt::EventType::get(op->getContext()), initVal);
newInitVals.push_back(cast.getResult(0));
Expand Down Expand Up @@ -996,7 +998,7 @@ class ScfParOpConversion : public OpConversionPattern<scf::ParallelOp> {
rewriter.setInsertionPointAfter(newOp);
SmallVector<Value> newResults;
for (auto res : newOp->getResults()) {
if (res.getType().isa<airrt::EventType>()) {
if (llvm::isa<airrt::EventType>(res.getType())) {
auto ty = air::AsyncTokenType::get(op->getContext());
auto cast =
rewriter.create<UnrealizedConversionCastOp>(op->getLoc(), ty, res);
Expand Down Expand Up @@ -1086,7 +1088,7 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
TypeConverter converter;
converter.addConversion([&](Type type) -> std::optional<Type> {
// convert !air.async.token to !airrt.event
if (auto t = type.dyn_cast<air::AsyncTokenType>())
if (auto t = llvm::dyn_cast<air::AsyncTokenType>(type))
return airrt::EventType::get(context);
else
return type;
Expand Down Expand Up @@ -1147,53 +1149,52 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
});

target.addDynamicallyLegalOp<memref::DeallocOp>([&](memref::DeallocOp op) {
return (
op.getMemref().getType().cast<MemRefType>().getMemorySpaceAsInt() !=
(int)air::MemorySpace::L2);
return (llvm::cast<MemRefType>(op.getMemref().getType())
.getMemorySpaceAsInt() != (int)air::MemorySpace::L2);
});

target.addDynamicallyLegalOp<scf::ForOp>([&](scf::ForOp op) {
for (auto o : op.getRegionIterArgs()) {
if (o.getType().isa<air::AsyncTokenType>())
if (llvm::isa<air::AsyncTokenType>(o.getType()))
return false;
}
return true;
});

target.addDynamicallyLegalOp<scf::ParallelOp>([&](scf::ParallelOp op) {
for (auto v : op.getResults()) {
if (v.getType().isa<air::AsyncTokenType>())
if (llvm::isa<air::AsyncTokenType>(v.getType()))
return false;
}
return true;
});

target.addDynamicallyLegalOp<scf::YieldOp>([&](scf::YieldOp op) {
for (auto v : op.getResults()) {
if (v.getType().isa<air::AsyncTokenType>())
if (llvm::isa<air::AsyncTokenType>(v.getType()))
return false;
}
return true;
});

target.addDynamicallyLegalOp<scf::ReduceOp>([&](scf::ReduceOp op) {
for (auto o : op.getOperands())
if (o.getType().isa<air::AsyncTokenType>())
if (llvm::isa<air::AsyncTokenType>(o.getType()))
return false;
return true;
});

target.addDynamicallyLegalOp<scf::ReduceReturnOp>(
[&](scf::ReduceReturnOp op) {
if (op.getResult().getType().isa<air::AsyncTokenType>())
if (llvm::isa<air::AsyncTokenType>(op.getResult().getType()))
return false;
else
return true;
});

target.addDynamicallyLegalOp<scf::IfOp>([&](scf::IfOp op) {
for (auto v : op.getResults()) {
if (v.getType().isa<air::AsyncTokenType>())
if (llvm::isa<air::AsyncTokenType>(v.getType()))
return false;
}
return true;
Expand Down
4 changes: 2 additions & 2 deletions mlir/lib/Conversion/AIRPipeline.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@ LogicalResult AIRPipeStageConversion::matchAndRewrite(
// For each output of the pipeline stage, create a buffer + store
SmallVector<Value, 4> bufs;
for (auto o : yield.getOperands()) {
if (RankedTensorType tt = o.getType().dyn_cast<RankedTensorType>()) {
if (RankedTensorType tt = llvm::dyn_cast<RankedTensorType>(o.getType())) {
auto memrefTy = MemRefType::get(tt.getShape(), tt.getElementType());
rewriter.setInsertionPoint(aif);
auto buf = rewriter.create<memref::AllocOp>(op->getLoc(), memrefTy);
Expand All @@ -83,7 +83,7 @@ LogicalResult AIRPipeStageConversion::matchAndRewrite(
SmallVector<Value, 4> bufs;
rewriter.setInsertionPoint(aif);
for (auto o : yield.getOperands()) {
if (RankedTensorType tt = o.getType().dyn_cast<RankedTensorType>()) {
if (RankedTensorType tt = llvm::dyn_cast<RankedTensorType>(o.getType())) {
rewriter.setInsertionPoint(&yield);
auto idValPlus =
rewriter.create<arith::ConstantIndexOp>(op->getLoc(), id + 1);
Expand Down
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