fix compiler warnings on new nightly

Extra unsafe block, elided lifetimes, and unnecessary feature.

boards/components/src/process_console.rs

@@ -141,18 +141,16 @@ impl<const COMMAND_HISTORY_LEN: usize, A: 'static + Alarm<'static>> Component
         // debugging in process console.
         // SAFETY: These statics are defined by the linker script, and we are merely creating
         // pointers to them.
-        let kernel_addresses = unsafe {
-            process_console::KernelAddresses {
-                stack_start: core::ptr::addr_of!(_sstack),
-                stack_end: core::ptr::addr_of!(_estack),
-                text_start: core::ptr::addr_of!(_stext),
-                text_end: core::ptr::addr_of!(_etext),
-                read_only_data_start: core::ptr::addr_of!(_srodata),
-                relocations_start: core::ptr::addr_of!(_srelocate),
-                relocations_end: core::ptr::addr_of!(_erelocate),
-                bss_start: core::ptr::addr_of!(_szero),
-                bss_end: core::ptr::addr_of!(_ezero),
-            }
+        let kernel_addresses = process_console::KernelAddresses {
+            stack_start: core::ptr::addr_of!(_sstack),
+            stack_end: core::ptr::addr_of!(_estack),
+            text_start: core::ptr::addr_of!(_stext),
+            text_end: core::ptr::addr_of!(_etext),
+            read_only_data_start: core::ptr::addr_of!(_srodata),
+            relocations_start: core::ptr::addr_of!(_srelocate),
+            relocations_end: core::ptr::addr_of!(_erelocate),
+            bss_start: core::ptr::addr_of!(_szero),
+            bss_end: core::ptr::addr_of!(_ezero),
         };
 
         let console_alarm = static_buffer.0.write(VirtualMuxAlarm::new(self.alarm_mux));

capsules/extra/src/ambient_light.rs

@@ -54,8 +54,8 @@ impl<'a> AmbientLight<'a> {
     pub fn new(
         sensor: &'a dyn hil::sensors::AmbientLight<'a>,
         grant: Grant<App, UpcallCount<{ upcall::COUNT }>, AllowRoCount<0>, AllowRwCount<0>>,
-    ) -> AmbientLight {
-        AmbientLight {
+    ) -> Self {
+        Self {
             sensor,
             command_pending: Cell::new(false),
             apps: grant,

capsules/extra/src/net/sixlowpan/sixlowpan_state.rs

@@ -646,7 +646,7 @@ pub struct RxState<'a> {
 }
 
 impl<'a> ListNode<'a, RxState<'a>> for RxState<'a> {
-    fn next(&'a self) -> &'a ListLink<RxState<'a>> {
+    fn next(&'a self) -> &'a ListLink<'a, RxState<'a>> {
         &self.next
     }
 }

chips/rp2040/src/pwm.rs

@@ -627,7 +627,7 @@ impl<'a> Pwm<'a> {
     /// The returned structure can be used to control the PWM pin.
     ///
     /// See [PwmPin]
-    pub fn gpio_to_pwm_pin(&'a self, gpio: RPGpio) -> PwmPin {
+    pub fn gpio_to_pwm_pin(&'a self, gpio: RPGpio) -> PwmPin<'a> {
         let (channel_number, channel_pin) = self.gpio_to_pwm(gpio);
         self.new_pwm_pin(channel_number, channel_pin)
     }

chips/sam4l/src/adc.rs

@@ -326,8 +326,8 @@ impl<'a> Adc<'a> {
     /// Create a new ADC driver.
     ///
     /// - `rx_dma_peripheral`: type used for DMA transactions
-    pub fn new(rx_dma_peripheral: dma::DMAPeripheral, pm: &'static pm::PowerManager) -> Adc {
-        Adc {
+    pub fn new(rx_dma_peripheral: dma::DMAPeripheral, pm: &'static pm::PowerManager) -> Self {
+        Self {
             // pointer to memory mapped I/O registers
             registers: BASE_ADDRESS,
 

chips/stm32f303xc/src/syscfg.rs

@@ -125,8 +125,8 @@ pub struct Syscfg<'a> {
 }
 
 impl<'a> Syscfg<'a> {
-    pub const fn new(rcc: &'a rcc::Rcc) -> Syscfg {
-        Syscfg {
+    pub const fn new(rcc: &'a rcc::Rcc) -> Self {
+        Self {
             registers: SYSCFG_BASE,
             clock: SyscfgClock(rcc::PeripheralClock::new(
                 rcc::PeripheralClockType::APB2(rcc::PCLK2::SYSCFG),

chips/stm32f4xx/src/adc.rs

@@ -314,8 +314,8 @@ pub struct Adc<'a> {
 }
 
 impl<'a> Adc<'a> {
-    pub const fn new(clocks: &'a dyn Stm32f4Clocks) -> Adc {
-        Adc {
+    pub const fn new(clocks: &'a dyn Stm32f4Clocks) -> Self {
+        Self {
             registers: ADC1_BASE,
             common_registers: ADC_COMMON_BASE,
             clock: AdcClock(phclk::PeripheralClock::new(

chips/stm32f4xx/src/dma.rs

@@ -1543,8 +1543,8 @@ pub struct Dma1<'a> {
 }
 
 impl<'a> Dma1<'a> {
-    pub const fn new(clocks: &'a dyn Stm32f4Clocks) -> Dma1 {
-        Dma1 {
+    pub const fn new(clocks: &'a dyn Stm32f4Clocks) -> Self {
+        Self {
             registers: DMA1_BASE,
             clock: DmaClock(phclk::PeripheralClock::new(
                 phclk::PeripheralClockType::AHB1(phclk::HCLK1::DMA1),
@@ -1664,8 +1664,8 @@ pub struct Dma2<'a> {
 }
 
 impl<'a> Dma2<'a> {
-    pub const fn new(clocks: &'a dyn Stm32f4Clocks) -> Dma2 {
-        Dma2 {
+    pub const fn new(clocks: &'a dyn Stm32f4Clocks) -> Self {
+        Self {
             registers: DMA2_BASE,
             clock: DmaClock(phclk::PeripheralClock::new(
                 phclk::PeripheralClockType::AHB1(phclk::HCLK1::DMA2),

kernel/src/scheduler/cooperative.rs

@@ -37,7 +37,7 @@ impl<'a> CoopProcessNode<'a> {
 }
 
 impl<'a> ListNode<'a, CoopProcessNode<'a>> for CoopProcessNode<'a> {
-    fn next(&'a self) -> &'a ListLink<'a, CoopProcessNode> {
+    fn next(&'a self) -> &'a ListLink<'a, CoopProcessNode<'a>> {
         &self.next
     }
 }

kernel/src/scheduler/round_robin.rs

@@ -43,7 +43,7 @@ impl<'a> RoundRobinProcessNode<'a> {
 }
 
 impl<'a> ListNode<'a, RoundRobinProcessNode<'a>> for RoundRobinProcessNode<'a> {
-    fn next(&'a self) -> &'a ListLink<'a, RoundRobinProcessNode> {
+    fn next(&'a self) -> &'a ListLink<'a, RoundRobinProcessNode<'a>> {
         &self.next
     }
 }

kernel/src/utilities/binary_write.rs

@@ -65,8 +65,8 @@ pub struct WriteToBinaryOffsetWrapper<'a> {
 }
 
 impl<'a> WriteToBinaryOffsetWrapper<'a> {
-    pub fn new(binary_writer: &'a mut dyn BinaryWrite) -> WriteToBinaryOffsetWrapper {
-        WriteToBinaryOffsetWrapper {
+    pub fn new(binary_writer: &'a mut dyn BinaryWrite) -> Self {
+        Self {
             binary_writer,
             index: 0,
             offset: 0,
@@ -153,8 +153,8 @@ pub(crate) struct BinaryToWriteWrapper<'a> {
 }
 
 impl<'a> BinaryToWriteWrapper<'a> {
-    pub(crate) fn new(writer: &'a mut dyn core::fmt::Write) -> BinaryToWriteWrapper {
-        BinaryToWriteWrapper { writer }
+    pub(crate) fn new(writer: &'a mut dyn core::fmt::Write) -> Self {
+        Self { writer }
     }
 }
 

libraries/riscv-csr/src/lib.rs

@@ -6,7 +6,6 @@
 //!
 //! Uses the Tock Register Interface to control RISC-V CSRs.
 
-#![feature(asm_const)]
 #![no_std]
 
 pub mod csr;