Enhanced maximum link rate fix, Fixed the page fault in the LSPCON dr…

…iver, Submodules refactoring. (#72)

Changelog.md

@@ -1,5 +1,9 @@
 WhateverGreen Changelog
 =======================
+#### v1.4.4
+- Extended the maximum link rate fix: Now probe the rate from DPCD automatically and support Intel ICL platforms. (by @0xFireWolf)
+- Fixed an issue that LSPCON driver causes a page fault if the maximum link rate fix is not enabled. (by @0xFireWolf)
+
 #### v1.4.3
 - Added CFL and CML P630
 - Added MacKernelSDK with Xcode 12 compatibility

Manual/FAQ.IntelHD.cn.md

@@ -1740,11 +1740,45 @@ EDID 信息可以通过诸如使用 [Linux](https://unix.stackexchange.com/quest
 ## 修复笔记本内屏返回错误的最大链路速率值的问题 (Dell XPS 15 9570 等高分屏笔记本)
 为核显添加 `enable-dpcd-max-link-rate-fix` 属性或者直接使用 `-igfxmlr` 启动参数以解决系统在点亮内屏时直接崩溃的问题。  
 从 1.3.7 版本开始，此补丁同时修正从屏幕扩展属性里读取的错误速率值问题以解决在 Dell 灵越 7590 系列等新款笔记本上内核崩溃的问题。  
+从 1.4.4 版本开始，如果用户未定义 `dpcd-max-link-rate` 属性的话，此补丁将自动从 DPCD 寻找内屏支持的最大链路速率值。此外此补丁已适配 Ice Lake 平台。
 ![](https://github.com/acidanthera/WhateverGreen/blob/master/Manual/Img/dpcd_mlr.png)  
 另外可使用 `dpcd-max-link-rate` 这个属性来为笔记本内屏指定一个最大链路速率值。  
 4K 内屏一般使用 `0x14`，1080p 内屏使用 `0x0A` 即可。  
 可选值为 `0x06` (RBR)，`0x0A` (HBR)，`0x14` (HBR2) 以及 `0x1E` (HBR3)。  
-若指定了其他值，则补丁默认使用 `0x14`。若不定义此属性的话，同样默认使用 `0x14`。  
+若指定了其他值，或者未定义此属性的话，则补丁默认自动寻找内屏所支持的链路最大值。  
+若显卡驱动不支持找到的链路最大值的话，那么之后会触发内核崩溃，因此你需要按照上述方法手动指定一个合法的值。（这个情况理论上应该很少见。）  
+
+<details>
+<summary>调试</summary>
+当驱动自动寻找最大链路速率值时，你会在内核日志里发现如下的日志。  
+在此例中，Dell XPS 15 9570 的 4K 内屏所支持的最大链路速率值为 5.4 Gbps，因此补丁写入对应的 `0x14` 值。
+
+```
+igfx: @ (DBG) MLR: Found CFL- platforms. Will setup the fix for the CFL- graphics driver.
+igfx: @ (DBG) MLR: [CFL-] Functions have been routed successfully.
+igfx: @ (DBG) MLR: [CFL-] wrapReadAUX() Called with controller at 0xffffff802ca6e000 and framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x0; Length = 16.
+igfx: @ (DBG) MLR: [COMM] GetFBIndex() Port at 0x0; Framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Will probe the maximum link rate from the table.
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x700; Length = 1.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Found eDP version 1.4+ (Value = 0x4).
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x10; Length = 16.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[0] =  8100; Link Rate = 1620000000; Decimal Value = 0x06.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[1] = 10800; Link Rate = 2160000000; Decimal Value = 0x08.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[2] = 12150; Link Rate = 2430000000; Decimal Value = 0x09.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[3] = 13500; Link Rate = 2700000000; Decimal Value = 0x0a.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[4] = 16200; Link Rate = 3240000000; Decimal Value = 0x0c.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[5] = 21600; Link Rate = 4320000000; Decimal Value = 0x10.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[6] = 27000; Link Rate = 5400000000; Decimal Value = 0x14.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() End of table.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Maximum link rate 0x14 has been set in the DPCD buffer.
+igfx: @ (DBG) MLR: [CFL-] wrapReadAUX() Called with controller at 0xffffff802ca6e000 and framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x2200; Length = 16.
+igfx: @ (DBG) MLR: [COMM] GetFBIndex() Port at 0x0; Framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Will use the maximum link rate specified by user or cached by the previous probe call.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Maximum link rate 0x14 has been set in the DPCD buffer.
+```
+</details>
 
 
 ## 修复核显驱动在尝试点亮外接 HDMI 高分辨率显示器时造成的死循环问题

Manual/FAQ.IntelHD.en.md

@@ -2381,8 +2381,43 @@ Or instead of this property, use the boot-arg `-wegnoegpu`
 
 Add the `enable-dpcd-max-link-rate-fix` property to `IGPU`, otherwise a kernel panic would happen due to a division-by-zero. Or instead of this property, use the boot-arg `-igfxmlr`.  
 Starting from v1.3.7, it also fixes the invalid max link rate value read from the extended DPCD buffer. This fixes the kernel panic on new laptops, such as Dell Inspiron 7590 with Sharp display.  
+Starting from v1.4.4, it probes the maximum link rate value automatically if the property `dpcd-max-link-rate` is not specified, and it now supports Ice Lake platforms.  
 ![dpcd_mlr](./Img/dpcd_mlr.png)  
-You could also manually specify a maximum link rate value via the `dpcd-max-link-rate` for the builtin display. Typically use `0x14` for 4K display and `0x0A` for 1080p display. All possible values are `0x06` (RBR), `0x0A` (HBR), `0x14` (HBR2) and `0x1E` (HBR3). If an invalid value is specified or property `dpcd-max-link-rate` is not specified, the driver will use the default value `0x14`.  
+You could also manually specify a maximum link rate value via the `dpcd-max-link-rate` for the builtin display. Typically use `0x14` for 4K display and `0x0A` for 1080p display. All possible values are `0x06` (RBR), `0x0A` (HBR), `0x14` (HBR2) and `0x1E` (HBR3).   
+If an invalid value is specified or property `dpcd-max-link-rate` is not specified, the driver will probe the maximum link rate from DPCD instead.  
+If the probed value is not supported by the driver (which should rarely happen), you need to manually specify a valid one, otherwise the graphics driver will trigger a kernel panic due to a division-by-zero later.
+
+<details>
+<summary>Spoiler: Debugging</summary>
+When the driver probes the maximum link rate from DPCD, you should be able to see something similar to the following lines in your kernel log.  
+The maximum link rate reported by the 4K panel on Dell XPS 15 9570 is 5.4 Gbps, and thus the fix writes `0x14` to the DPCD buffer.
+
+```
+igfx: @ (DBG) MLR: Found CFL- platforms. Will setup the fix for the CFL- graphics driver.
+igfx: @ (DBG) MLR: [CFL-] Functions have been routed successfully.
+igfx: @ (DBG) MLR: [CFL-] wrapReadAUX() Called with controller at 0xffffff802ca6e000 and framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x0; Length = 16.
+igfx: @ (DBG) MLR: [COMM] GetFBIndex() Port at 0x0; Framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Will probe the maximum link rate from the table.
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x700; Length = 1.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Found eDP version 1.4+ (Value = 0x4).
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x10; Length = 16.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[0] =  8100; Link Rate = 1620000000; Decimal Value = 0x06.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[1] = 10800; Link Rate = 2160000000; Decimal Value = 0x08.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[2] = 12150; Link Rate = 2430000000; Decimal Value = 0x09.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[3] = 13500; Link Rate = 2700000000; Decimal Value = 0x0a.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[4] = 16200; Link Rate = 3240000000; Decimal Value = 0x0c.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[5] = 21600; Link Rate = 4320000000; Decimal Value = 0x10.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() Table[6] = 27000; Link Rate = 5400000000; Decimal Value = 0x14.
+igfx: @ (DBG) MLR: [COMM] ProbeMaxLinkRate() End of table.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Maximum link rate 0x14 has been set in the DPCD buffer.
+igfx: @ (DBG) MLR: [CFL-] wrapReadAUX() Called with controller at 0xffffff802ca6e000 and framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] orgReadAUX() Routed to CFL IMP with Address = 0x2200; Length = 16.
+igfx: @ (DBG) MLR: [COMM] GetFBIndex() Port at 0x0; Framebuffer at 0xffffff81aa5a3000.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Will use the maximum link rate specified by user or cached by the previous probe call.
+igfx: @ (DBG) MLR: [COMM] wrapReadAUX() Maximum link rate 0x14 has been set in the DPCD buffer.
+```
+</details>
 
 ## Fix the infinite loop on establishing Intel HDMI connections with a higher pixel clock rate on Skylake, Kaby Lake and Coffee Lake platforms
 Add the `enable-hdmi-dividers-fix` property to `IGPU` or use the `-igfxhdmidivs` boot argument instead to fix the infinite loop when the graphics driver tries to establish a HDMI connection with a higher pixel clock rate, for example connecting to a 2K/4K display with HDMI 1.4, otherwise the system just hangs (and your builtin laptop display remains black) when you plug in the HDMI cable.  

WhateverGreen.xcodeproj/project.pbxproj

@@ -35,6 +35,10 @@
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+		D515168325195D58003CF0E6 /* kern_igfx_i2c_aux.cpp in Sources */ = {isa = PBXBuildFile; fileRef = D515168125195D58003CF0E6 /* kern_igfx_i2c_aux.cpp */; };
+		D5224EF125172B2500D5CF16 /* kern_igfx_clock.cpp in Sources */ = {isa = PBXBuildFile; fileRef = D5224EF025172B2500D5CF16 /* kern_igfx_clock.cpp */; };
+		D5224F492518928300D5CF16 /* kern_igfx_lspcon.cpp in Sources */ = {isa = PBXBuildFile; fileRef = D5224F472518928300D5CF16 /* kern_igfx_lspcon.cpp */; };
+		D5224F4A2518928300D5CF16 /* kern_igfx_lspcon.hpp in Headers */ = {isa = PBXBuildFile; fileRef = D5224F482518928300D5CF16 /* kern_igfx_lspcon.hpp */; };
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@@ -130,6 +134,10 @@
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 		CEEF190A239CFDB1005B3BE8 /* FAQ.Chart.md */ = {isa = PBXFileReference; lastKnownFileType = net.daringfireball.markdown; path = FAQ.Chart.md; sourceTree = "<group>"; };
+		D515168125195D58003CF0E6 /* kern_igfx_i2c_aux.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = kern_igfx_i2c_aux.cpp; sourceTree = "<group>"; };
+		D5224EF025172B2500D5CF16 /* kern_igfx_clock.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = kern_igfx_clock.cpp; sourceTree = "<group>"; };
+		D5224F472518928300D5CF16 /* kern_igfx_lspcon.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = kern_igfx_lspcon.cpp; sourceTree = "<group>"; };
+		D5224F482518928300D5CF16 /* kern_igfx_lspcon.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = kern_igfx_lspcon.hpp; sourceTree = "<group>"; };
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@@ -192,6 +200,10 @@
 				CE7FC0AD20F5622700138088 /* kern_igfx.hpp */,
 				CE1F61B82432DEE800201DF4 /* kern_igfx_debug.cpp */,
 				D5C32F5524FC45D30078A824 /* kern_igfx_memory.cpp */,
+				D5224EF025172B2500D5CF16 /* kern_igfx_clock.cpp */,
+				D5224F472518928300D5CF16 /* kern_igfx_lspcon.cpp */,
+				D5224F482518928300D5CF16 /* kern_igfx_lspcon.hpp */,
+				D515168125195D58003CF0E6 /* kern_igfx_i2c_aux.cpp */,
 				2F30012324A00F2800C590C3 /* kern_igfx_pm.cpp */,
 				CE7FC0A820F55E7400138088 /* kern_ngfx.cpp */,
 				CE7FC0A920F55E7400138088 /* kern_ngfx.hpp */,
@@ -319,6 +331,7 @@
 				CE7FC0B520F6809600138088 /* kern_shiki.hpp in Headers */,
 				1C9CB7B11C789FF500231E41 /* kern_rad.hpp in Headers */,
 				CEC8E2F120F765E700D3CA3A /* kern_cdf.hpp in Headers */,
+				D5224F4A2518928300D5CF16 /* kern_igfx_lspcon.hpp in Headers */,
 				CE766ED7210763B200A84567 /* kern_guc.hpp in Headers */,
 				CEB402A61F17F5C400716912 /* kern_con.hpp in Headers */,
 				CE19710021C380DF00B02AB4 /* kern_nvhda.hpp in Headers */,
@@ -441,8 +454,10 @@
 			isa = PBXSourcesBuildPhase;
 			buildActionMask = 2147483647;
 			files = (
+				D515168325195D58003CF0E6 /* kern_igfx_i2c_aux.cpp in Sources */,
 				CE7FC0AE20F5622700138088 /* kern_igfx.cpp in Sources */,
 				CEC8E2F020F765E700D3CA3A /* kern_cdf.cpp in Sources */,
+				D5224EF125172B2500D5CF16 /* kern_igfx_clock.cpp in Sources */,
 				1C9CB7B01C789FF500231E41 /* kern_rad.cpp in Sources */,
 				CE766ED6210763B200A84567 /* kern_guc.cpp in Sources */,
 				CE7FC0B420F6809600138088 /* kern_shiki.cpp in Sources */,
@@ -454,6 +469,7 @@
 				D5C32F5624FC45D30078A824 /* kern_igfx_memory.cpp in Sources */,
 				CE405ED91E4A080700AA0B3D /* plugin_start.cpp in Sources */,
 				CE7FC0CB20F682A300138088 /* kern_resources.cpp in Sources */,
+				D5224F492518928300D5CF16 /* kern_igfx_lspcon.cpp in Sources */,
 				CE1F61B92432DEE800201DF4 /* kern_igfx_debug.cpp in Sources */,
 				CE7FC0AA20F55E7400138088 /* kern_ngfx.cpp in Sources */,
 				1C748C2D1C21952C0024EED2 /* kern_start.cpp in Sources */,