- Cairo, Egypt
-
14:00
(UTC +03:00) - https://leetcode.com/saykamel/
- in/ahmd-kamel
Highlights
- Pro
Block or Report
Block or report ahmd-kamel
Contact GitHub support about this user’s behavior. Learn more about reporting abuse.
Report abusePinned Loading
-
Huffman-Coding
Huffman-Coding PublicHuffman Coding lossless compression algorithm Implementation using C++ and Qt.
C++
-
Single-Cycle-Miroprocessor_MIPS-ISA
Single-Cycle-Miroprocessor_MIPS-ISA PublicDesigning Single-Cycle Microprocessor without Interlocked Pipeline Stages (MIPS) using Verilog.
Verilog
-
ATM-Bank-Finite-State-Machine
ATM-Bank-Finite-State-Machine PublicDigital Design & Verification by implementing the core of the bank ATM design as well as verification environment.
C++
-
Memory-Verification-using-UVM
Memory-Verification-using-UVM PublicVerification of Memory Using Class Based Environment and UVM Environment.
SystemVerilog
-
Design-Verification-FIFO_IP
Design-Verification-FIFO_IP PublicThis project focuses on the design and verification of FIFOs, which is essential in digital systems for managing data flow between different components.
SystemVerilog
-
Floating-Point-Unit-IEEE-754
Floating-Point-Unit-IEEE-754 PublicDesign and Verification of Floating Point Unit(FPU) in verilog and systemverilog following the IEEE754 - 2019 Standard
Verilog
If the problem persists, check the GitHub status page or contact support.