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1. Huffman-Coding Huffman-Coding Public

   Huffman Coding lossless compression algorithm Implementation using C++ and Qt.

   C++

2. Single-Cycle-Miroprocessor_MIPS-ISA Single-Cycle-Miroprocessor_MIPS-ISA Public

   Designing Single-Cycle Microprocessor without Interlocked Pipeline Stages (MIPS) using Verilog.

   Verilog

3. ATM-Bank-Finite-State-Machine ATM-Bank-Finite-State-Machine Public

   Digital Design & Verification by implementing the core of the bank ATM design as well as verification environment.

   C++

4. Memory-Verification-using-UVM Memory-Verification-using-UVM Public

   Verification of Memory Using Class Based Environment and UVM Environment.

   SystemVerilog

5. Design-Verification-FIFO_IP Design-Verification-FIFO_IP Public

   This project focuses on the design and verification of FIFOs, which is essential in digital systems for managing data flow between different components.

   SystemVerilog

6. Floating-Point-Unit-IEEE-754 Floating-Point-Unit-IEEE-754 Public

   Design and Verification of Floating Point Unit(FPU) in verilog and systemverilog following the IEEE754 - 2019 Standard

   Verilog