Update to version 1.3.0

New Features in this Release:
- BareMetal FatFS Filesystem demo application
- Feature Updates for I3C Driver
- ADC Potentiometer FreeRTOS application
- User configurable timing options  for OSPI XIP
- ICM42670 IMU driver
- New component for MIPI DPHY
- Support for ILI9488 1-lane Display
- Support for AR0145 Camera Sensor
- Support for OV5647 Camera Sensor
- Non-Secure TCM partitions support without using cmse feature
- Support for auto creation of NS TCM partition using linker script.
- I2C address selection support for GT911 Touch Controller

Updates / Fixes in this Release:
- Updates in SPI, PDM, Camera Sensor, LCD panel, CDC200, PDM & CPI drivers
- Updates in PM, I3C, LP/PDM applications
- Update to SE FW v1.100.0

PSBT Jira's addressed:
- PSBT-701: [ RTSS Camera Sensors ] Camera sensor enable macros needs to be modified in RTE_Device.h file.
- PSBT-663: nx_phy_setmode declaration conflicts with definition
- PSBT-607: MT9M114 camera driver: Option to use lower resolution with MIPI interface
- PSBT-628: RTE_Device.h throws error whn open in (vscode) configuration wizard
- PSBT-675: [ RTSS Utimer ] Not able to run the Utimer Azure RTOS application build from VS Code
- PSBT-702: [ RTSS VS Code ] Getting compilation issue when trying to build blinky application using latest CMSIS 1.3.0-rc1 pack
- PSBT-678: [RTSS PM] Failed to fetch boot logs for PM demo application with VS code build
- PSBT-725: [ RTSS LPTIMER ] AzureRTOS LPTIMER Application is showing twice when we are selecting application in ARMDS
- PSBT-747: [ RTSS ] Improper naming in the rteconfig file for ILI9488 LCD display
- RBTP-205: Incorrect setting of the burst_len in the PDM driver
- RBTP-206: Incorrectly named macro (ARM_PDM_MODE_FULL_BANDWIDTH_AUDIO_3071_CLK_FRQ) in the PDM header file
- RBTP-207: Add a note that MPU_Load_Regions is executed before scatter load

Removed / Deprecated in this Release:
- None

Migration Guide for this release:
- AlifSemiconductor::Device:SOC Peripherals:MIPI DSI CSI2 DPHY component needed for Camera or Display
- tcm_partitions.c must be placed on primary boot media (meaning in XIP build, this must be on MRAM)

Alif_CMSIS/Include/Driver_CDC200.h

@@ -49,13 +49,15 @@ extern "C"
 /****** CDC200 Control Function Operation codes *****/
 #define CDC200_CONFIGURE_DISPLAY         (1U << 0)    ///< Configure Display
 #define CDC200_FRAMEBUF_UPDATE           (1U << 1)    ///< Update layer Frame buffer
-#define CDC200_SCANLINE0_EVENT           (1U << 2)    ///< Enable/Disable Scanline0 event
-#define CDC200_CONFIGURE_LAYER           (1U << 3)    ///< Configure Layer
-#define CDC200_LAYER_ON                  (1U << 4)    ///< Turn On the Layer
-#define CDC200_LAYER_OFF                 (1U << 5)    ///< Turn Off the Layer
-#define CDC200_CONFIGURE_LAYER_WINDOW    (1U << 6)    ///< Configure Layer window
-#define CDC200_CONFIGURE_BG_COLOR        (1U << 7)    ///< Configure Background color
-#define CDC200_CONFIGURE_LAYER_BLENDING  (1U << 8)    ///< Configure Layer blending
+#define CDC200_FRAMEBUF_UPDATE_VSYNC     (1U << 2)    ///< Update layer Frame buffer on vertical blanking
+#define CDC200_SCANLINE0_EVENT           (1U << 3)    ///< Enable/Disable Scanline0 event
+#define CDC200_CONFIGURE_LAYER           (1U << 4)    ///< Configure Layer
+#define CDC200_LAYER_ON                  (1U << 5)    ///< Turn On the Layer
+#define CDC200_LAYER_OFF                 (1U << 6)    ///< Turn Off the Layer
+#define CDC200_CONFIGURE_LAYER_WINDOW    (1U << 7)    ///< Configure Layer window
+#define CDC200_CONFIGURE_BG_COLOR        (1U << 8)    ///< Configure Background color
+#define CDC200_CONFIGURE_LAYER_BLENDING  (1U << 9)    ///< Configure Layer blending
+
 
 /**
 \brief CDC200 Layer index
@@ -145,6 +147,7 @@ typedef struct _ARM_CDC200_LAYER_INFO {
   \param[in]   control CDC200 contol code operation.
                  - \ref CDC200_CONFIGURE_DISPLAY :         Configure Display
                  - \ref CDC200_FRAMEBUF_UPDATE :           Update layer Frame buffer
+                 - \ref CDC200_FRAMEBUF_UPDATE_VSYNC :     Update layer Frame buffer on vertical blanking
                  - \ref CDC200_SCANLINE0_EVENT :           Enable/Disable Scanline0 event
                  - \ref CDC200_CONFIGURE_LAYER :           Configure Layer
                  - \ref CDC200_LAYER_ON :                  Turn On the Layer
@@ -155,6 +158,7 @@ typedef struct _ARM_CDC200_LAYER_INFO {
   \param[in]   arg Argument of operation.
                 - CDC200_CONFIGURE_DISPLAY :         Frame buffer address
                 - CDC200_FRAMEBUF_UPDATE :           Frame buffer address
+                - CDC200_FRAMEBUF_UPDATE_VSYNC :     Frame buffer address
                 - CDC200_SCANLINE0_EVENT :           ENABLE/DISABLE
                 - CDC200_CONFIGURE_LAYER :           Pointer to layer info \ref ARM_CDC200_LAYER_INFO
                 - CDC200_LAYER_ON :                  layer index /ref ARM_CDC200_LAYER_INDEX

Alif_CMSIS/Include/Driver_CPI.h

@@ -35,6 +35,8 @@ extern "C"
 #define CPI_EVENTS_CONFIGURE                                       (0x03UL) ///< CAMERA EVENTS configure; arg: list of events to enable (ARM_CPI_EVENT_*)
 #define CPI_CAMERA_SENSOR_GAIN                                     (0x04UL) ///< CAMERA SENSOR gain set; arg: 0x10000 * gain, 0=read only. Returns current/updated gain if no error.
 #define CPI_CONFIGURE                                              (0x05UL) ///< CPI configure
+#define CPI_CAMERA_SENSOR_AE                                       (0x06UL) ///< CAMERA SENSOR AE; arg: 0=disable, 1=enable
+#define CPI_CAMERA_SENSOR_AE_TARGET_LUMA                           (0x07UL) ///< CAMERA SENSOR AE Tagret LUMA; arg: Value for target luminance
 
 /****** CPI Events *****/
 #define ARM_CPI_EVENT_CAMERA_CAPTURE_STOPPED                       (1UL << 0) ///< Camera Capture Stopped

Alif_CMSIS/Include/Driver_PDM.h

@@ -35,15 +35,27 @@ extern "c"
 
 /* Control code for PDM */
 #define ARM_PDM_MODE_MICROPHONE_SLEEP                       0x00UL
-#define ARM_PDM_MODE_STANDARD_VOICE_512_CLK_FRQ             0x01UL
-#define ARM_PDM_MODE_HIGH_QUALITY_512_CLK_FRQ               0x02UL
-#define ARM_PDM_MODE_HIGH_QUALITY_768_CLK_FRQ               0x03UL
-#define ARM_PDM_MODE_HIGH_QUALITY_1024_CLK_FRQ              0x04UL
-#define ARM_PDM_MODE_WIDE_BANDWIDTH_AUDIO_1536_CLK_FRQ      0x05UL
-#define ARM_PDM_MODE_FULL_BANDWIDTH_AUDIO_2400_CLK_FRQ      0x06UL
-#define ARM_PDM_MODE_FULL_BANDWIDTH_AUDIO_3071_CLK_FRQ      0x07UL
-#define ARM_PDM_MODE_ULTRASOUND_4800_CLOCK_FRQ              0x08UL
-#define ARM_PDM_MODE_ULTRASOUND_96_SAMPLING_RATE            0x09UL
+#define ARM_PDM_MODE_AUDIOFREQ_8K_DECM_64                   0x01UL
+#define ARM_PDM_MODE_AUDIOFREQ_16K_DECM_32                  0x02UL
+#define ARM_PDM_MODE_AUDIOFREQ_16K_DECM_48                  0x03UL
+#define ARM_PDM_MODE_AUDIOFREQ_16K_DECM_64                  0x04UL
+#define ARM_PDM_MODE_AUDIOFREQ_32K_DECM_48                  0x05UL
+#define ARM_PDM_MODE_AUDIOFREQ_48K_DECM_50                  0x06UL
+#define ARM_PDM_MODE_AUDIOFREQ_48K_DECM_64                  0x07UL
+#define ARM_PDM_MODE_AUDIOFREQ_96K_DECM_50                  0x08UL
+#define ARM_PDM_MODE_AUDIOFREQ_192K_DECM_25                 0x09UL
+
+/* Control code for PDM. Old definitions, to be deprecated in future releases */
+#define ARM_PDM_MODE_STANDARD_VOICE_512_CLK_FRQ             ARM_PDM_MODE_AUDIOFREQ_8K_DECM_64
+#define ARM_PDM_MODE_HIGH_QUALITY_512_CLK_FRQ               ARM_PDM_MODE_AUDIOFREQ_16K_DECM_32
+#define ARM_PDM_MODE_HIGH_QUALITY_768_CLK_FRQ               ARM_PDM_MODE_AUDIOFREQ_16K_DECM_48
+#define ARM_PDM_MODE_HIGH_QUALITY_1024_CLK_FRQ              ARM_PDM_MODE_AUDIOFREQ_16K_DECM_64
+#define ARM_PDM_MODE_WIDE_BANDWIDTH_AUDIO_1536_CLK_FRQ      ARM_PDM_MODE_AUDIOFREQ_32K_DECM_48
+#define ARM_PDM_MODE_FULL_BANDWIDTH_AUDIO_2400_CLK_FRQ      ARM_PDM_MODE_AUDIOFREQ_48K_DECM_50
+/* Typo in macro name, should be '3072' KHz instead of '3071' */
+#define ARM_PDM_MODE_FULL_BANDWIDTH_AUDIO_3071_CLK_FRQ      ARM_PDM_MODE_AUDIOFREQ_48K_DECM_64
+#define ARM_PDM_MODE_ULTRASOUND_4800_CLOCK_FRQ              ARM_PDM_MODE_AUDIOFREQ_96K_DECM_50
+#define ARM_PDM_MODE_ULTRASOUND_96_SAMPLING_RATE            ARM_PDM_MODE_AUDIOFREQ_192K_DECM_25
 
 #define ARM_PDM_BYPASS_IIR_FILTER                           0x0AUL
 #define ARM_PDM_BYPASS_FIR_FILTER                           0x0BUL