adi_jesd204_hw.tcl: add ref_clock.out_clock phy.ref_clk connection on…

…ly for a10soc and s10soc on the rx side
analogdevicesinc · Aug 14, 2023 · 2f459b0 · 2f459b0
1 parent 9e56668
commit 2f459b0
Showing 1 changed file with 3 additions and 2 deletions.
diff --git a/library/intel/adi_jesd204/adi_jesd204_hw.tcl b/library/intel/adi_jesd204/adi_jesd204_hw.tcl
@@ -601,8 +601,9 @@ proc jesd204_compose {} {
     set data_direction source
     set jesd204_intfs {config device_config ilas_config device_event status}
     set tx_rx "rx"
-
-    # add_connection ref_clock.out_clk phy.ref_clk
+    if {$device_family == "Arria 10" || $device_family == "Stratix 10"} {
+      add_connection ref_clock.out_clk phy.ref_clk
+    }
   }
 
   add_instance axi_jesd204_${tx_rx} axi_jesd204_${tx_rx}