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axi_ad4858: channel fix read raw
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In the read raw data we got extra info for channel status.
Remove the priority check from if/else
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AndreiGrozav committed Sep 19, 2023
1 parent 04c1049 commit 5bbe6fb
Showing 1 changed file with 22 additions and 16 deletions.
38 changes: 22 additions & 16 deletions library/axi_ad4858/axi_ad4858_channel.v
Original file line number Diff line number Diff line change
Expand Up @@ -107,8 +107,8 @@ module axi_ad4858_channel #(
wire adc_valid_f2_ovs;
wire [31:0] adc_data_f2_ovs;

wire [31:0] expected_pattern;
wire [31:0] expected_package_pattern_s;
wire [31:0] expected_pattern;
wire [31:0] expected_package_pattern_s;

// expected pattern

Expand All @@ -129,36 +129,42 @@ module axi_ad4858_channel #(
end
end

// AD4858 is a 20 bit resolution ADC, when oversampling is enabled the data
// resolutions growes to 24
always @(posedge adc_clk) begin
adc_valid_f1 <= adc_ch_valid_in;
if (packet_format == 2'd0) begin
adc_raw_data <= {12'd0,adc_ch_data_in[19:0]};
adc_data_f1 <= adc_ch_data_in[23:0];
adc_or <= 1'b0;
adc_status_header <= 7'd0;
end else if (packet_format == 2'd1) begin
adc_raw_data <= {8'd0,adc_ch_data_in[23:0]};
if (oversampling_en == 0) begin
case ({packet_format,oversampling_en})
3'h0,3'h1: begin // packet format 20 - oversampling on/off
adc_raw_data <= {12'd0,adc_ch_data_in[19:0]};
adc_data_f1 <= {4'd0, adc_ch_data_in[19:0]};
adc_or <= 1'b0;
adc_status_header <= 7'd0;
end
3'h2: begin // packet format 24 - oversampling off
adc_raw_data <= {12'd0,adc_ch_data_in[23:4]};
adc_data_f1 <= {4'd0, adc_ch_data_in[23:4]};
adc_or <= adc_ch_data_in[3];
adc_status_header <= {adc_ch_data_in[2:0], 4'd0};
end else if (oversampling_en == 1) begin
end
3'h3: begin // packet format 24 - oversampling on
adc_raw_data <= {8'd0,adc_ch_data_in[23:0]};
adc_data_f1 <= adc_ch_data_in[23:0];
adc_or <= 3'd0;
adc_status_header <= 7'd0;
end
end else begin
adc_raw_data <= adc_ch_data_in;
if (oversampling_en == 0) begin
3'h4,3'h6: begin // packet format 32 - oversampling off
adc_raw_data <= {12'd0, adc_ch_data_in[31:12]};
adc_data_f1 <= {4'd0, adc_ch_data_in[31:12]};
adc_or <= adc_ch_data_in[11];
adc_status_header <= adc_ch_data_in[10:4];
end else if (oversampling_en == 1) begin
end
3'h5,3'h7: begin // packet format 32 - oversampling on
adc_raw_data <= {8'd0, adc_ch_data_in[31:8]};
adc_data_f1 <= adc_ch_data_in[31:8];
adc_or <= adc_ch_data_in[7];
adc_status_header <= adc_ch_data_in[6:0];
end
end
endcase
end

ad_datafmt #(
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