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Ad7616 Split serial vs parallel modes #1007
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Guideline check fails with the following message: Files with name errors: because the file has been deleted, as it is no longer needed for the axi_ad7616 IP. |
ad7616_sdz_zc706_pi:
ad7616_sdc_zed_pi:
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Seems fine to me!
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v2: Regenerated Makefile for ad7616_sdz/zc706 |
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Looks fine!
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v3: Fix interrupts |
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v5. Squashed commits. Rebased to master. |
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The IRQ output of AXI_AD7616 us not used any more.
In the system_project.tcl, an example of the non default mode should be given.
make SER_PAR_N=0
Also, ZC706 support can be removed in a separate commit part of this pull request.
Done. |
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v6. Added axi_clkgen instead of using only the sys_cpu_clk |
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I was able to build the parallel design without any problems. Looks good to me!
This commit makes the following changes: Add SPI Engine for serial mode Add SER_PAR_N build parameter, set default 1 for serial Fix irq consistency in ad7616_bd.tcl Fix regmap and offload names Fix system_top.v GPIOs
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The axi_ad7616 IP will now contain only the parallel data path of the ADC and the serial infrastructure will be replaced with the SPI Engine framework within the common block design.