hdl_2018_r2
Changelog:
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Supported tools version for this release are:
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Major updates:
- CORDIC based DDS
- several DMAC improvements
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Library updates:
- Generic transport layer core for JESD204
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New projects:
- adrv9009_a10gx
- adrv9009_a10soc
- daq3_zcu102
- fmcomms11_zc706
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Reference links:
*EXCEPTIONS: All the projects, that are using ZCU102 development platform, should be built with Vivado 2018.3, this is for the users owning a zcu102 rev1.1 starting from label 0432055-05. Due to an end of life of the DDR4 SODIMM part on the ZCU102 Evaluation Kit. The new memory requires different settings during the FSBL. Starting with Vivado 2018.3, when targeting a ZCU102 board, the FSBL will have a custom function to query the SPD prom on the DIMM to determine which DIMM is being used. This is described in: